cd-sem metrology semiconductor

**Semiconductor Metrology CD-SEM** is **critical dimension scanning electron microscopy used to measure feature widths, spacings, and profiles of patterned structures at nanometer resolution, serving as the primary inline metrology technique for lithography and etch process control in high-volume manufacturing**. **CD-SEM Operating Principles:** - **Electron Beam**: field-emission SEM operates at 300-800 eV landing energy to minimize resist shrinkage and charging while maintaining adequate signal-to-noise ratio - **Signal Detection**: secondary electrons (SE) emitted from feature edges produce intensity peaks—CD is measured as the distance between left and right edge peaks - **Resolution**: modern CD-SEMs achieve measurement precision <0.1 nm (3σ) on line/space patterns through extensive frame averaging and advanced algorithms - **Throughput**: production CD-SEMs (Hitachi CG6300, ASML eScan) measure 50-100 wafers/hour with 10-20 sites per wafer **Measurement Methodology:** - **Edge Detection Algorithms**: threshold-based, maximum slope, or model-based edge detection—each method gives different absolute CD values but must be consistent - **Line CD (LCD)**: width of a resist or etched line measured at multiple points along its length - **Space CD (SCD)**: width of the gap between adjacent lines—critical for metal pitch monitoring - **Line Edge Roughness (LER)**: 3σ variation of edge position along a line, measured over 1-2 µm length; target <1.5 nm for sub-7 nm nodes - **Line Width Roughness (LWR)**: 3σ variation of CD along a line; LWR = √2 × LER for uncorrelated edges **CD-SEM Challenges at Advanced Nodes:** - **Resist Shrinkage**: electron beam exposure causes EUV and ArF resist to shrink 1-5 nm during measurement—smart scanning strategies minimize dose to the measurement site - **Charging Effects**: insulating substrates and thin resist films accumulate charge, deflecting the electron beam and distorting measurements - **3D Structure Measurement**: CD-SEM provides top-down 2D profile only—cannot directly measure sidewall angle, undercut, or buried features - **Pattern Complexity**: multi-patterning (SADP, SAQP) creates alternating CD populations requiring separate measurement of core and spacer features **Advanced CD-SEM Capabilities:** - **Contour Metrology**: full 2D contour extraction of complex shapes (contact holes, line ends, tip-to-tip)—enables computational patterning analysis - **Design-Based Metrology (DBM)**: automatic placement of measurement sites based on design layout hotspots identified by computational lithography - **Machine Learning Algorithms**: neural network-based edge detection improves precision and reduces sensitivity to noise and charging artifacts - **Tilt-Beam SEM**: tilting electron beam 5-15° from vertical provides limited 3D information (sidewall angle estimation) **CD-SEM in Process Control:** - **Statistical Process Control (SPC)**: CD measurements feed real-time SPC charts with ±3σ control limits triggering alarms for out-of-spec conditions - **Advanced Process Control (APC)**: CD data drives feedback/feedforward loops adjusting lithography exposure dose (1% dose change ≈ 0.3-0.5 nm CD change) and etch parameters - **Reference Metrology**: CD-SEM measurements are calibrated against AFM and TEM reference measurements to establish absolute accuracy **CD-SEM remains the workhorse metrology tool for semiconductor patterning, where its combination of nanometer-scale precision, non-destructive measurement, and high throughput makes it indispensable for maintaining process control at the tightest tolerances demanded by leading-edge logic and memory manufacturing.**