dielectric capping layer

**Dielectric Capping Layer** is a **thin dielectric film deposited on top of the copper metallization** — serving as a diffusion barrier to prevent copper atoms from migrating into the overlying dielectric, and as an etch stop layer for the next via/trench patterning step. **What Is the Capping Layer?** - **Materials**: SiCN, SiN, SiC ($kappa approx 4.5-7$). Higher $kappa$ than the IMD. - **Thickness**: ~20-50 nm. - **Functions**: - **Cu Barrier**: Blocks copper out-diffusion (copper poisons SiO₂ and low-k). - **Etch Stop**: Provides selectivity during via etch. - **Electromigration**: Improves EM lifetime by capping the Cu/dielectric interface. **Why It Matters** - **$kappa$ Tax**: The capping layer's higher $kappa$ partially negates the benefits of using low-k IMD — a persistent integration challenge. - **Interface Quality**: The Cu/cap interface is the weakest point for electromigration failure. - **Self-Aligned Barriers**: Advanced processes use selective metal caps (CoWP, Ru) to replace dielectric caps for lower effective $kappa$. **Dielectric Capping Layer** is **the lid on the copper** — a necessary but $kappa$-unfriendly barrier that protects the copper wires from contaminating the surrounding insulation.