Double-Diffused Transistor
A double-diffused transistor is a bipolar junction transistor made by two successive diffusion steps into the same wafer: the first diffuses the base layer into the collector material, and the second diffuses a shallower emitter layer into that base. Both junctions are therefore buried below the surface and set by furnace time and temperature, and the base width is simply the difference between two junction depths. Developed at Bell Labs in 1955 and 1956, with a landmark report by Morris Tanenbaum and D. E. Thomas on diffused emitter and base silicon transistors, the structure gave precise, repeatable base widths and doping profiles, and its n-p-n layers are still the pattern that the modern bipolar transistor follows.
The central trick is compensation: the emitter dopant must out-number the base dopant near the surface. An n-type phosphorus diffusion into a p-type base is not a fresh layer but an overdose that turns the top of the base back into n-type, so the emitter is formed where its donor concentration exceeds the acceptor concentration, and the junction sits where the two concentrations cross. Since the emitter is much more heavily doped than the base, the emitter injection efficiency is high, and since the base doping falls steadily from the emitter side toward the collector, the structure automatically includes the built-in field that makes a drift transistor fast. The base width is then the gap between the emitter junction depth and the collector junction depth, which are often only a few tenths of a micrometre apart.
The precision comes from the physics of diffusion, which the process turns into a predictable recipe. For a given dopant at a given temperature, how deep the dopant reaches depends on the square root of time, and the surface concentration is set by the dopant source, so the two diffusions are controlled independently, with a deeper, longer base diffusion followed by a shorter, more heavily doped emitter diffusion. Because the base width is a small difference of two large numbers, a one-percent error in junction depth turns into several percent of error in the base width, and this explained why process control, furnace uniformity and ultra-clean handling became such central subjects in transistor manufacturing during the late 1950s.
The double-diffused transistor sits at the hinge between early transistor craft and the modern semiconductor process. It was the device structure that the mesa transistor etched into individual units and that the planar process then protected with an oxide layer, and the same two-step logic, using diffusion to build layers instead of growing a crystal around them, persisted through integrated circuits. A frequent misconception is that double-diffused means a transistor with two bases or two emitters; the word double counts the diffusion steps, not the terminals. Another is that the process is obsolete, when in fact power MOSFETs called DMOS devices still set their channel length as the difference between two diffusions, now frequently done with ion implantation followed by a drive-in anneal.
Its strengths are repeatability, speed and compatibility, while its weaknesses show at the edges and surface. Because the junctions come to the wafer surface, the sensitive exposed regions need protection, and early devices were leakage-prone until oxide passivation and the planar process arrived. The heavily doped emitter also causes real effects, such as reduced current gain at high emitter doping and band-gap narrowing, that designers learned about gradually. Still, the combination of a heavily doped, shallow emitter over a thin, graded base above a lightly doped collector is the recognizable cross-section of almost every discrete and integrated n-p-n transistor built since.
Read double-diffused transistor as the idea that a transistor's critical thickness can be the small difference between two furnace-controlled depths rather than a cut or a grown layer.