electron mobility

```svg Strained silicon: stretch the lattice and carriers move fasterDeforming the channel raises mobility — more drive current without shrinking the transistor1 · Strain vs mobilityspacing between atoms sets carrier speedrelaxed Sislowerstrained (stretched)fasterWider atomic spacing reshapes theenergy bands so electrons scatterless and drift faster for the samefield. Higher µ → higher drive current.µ = mobility · sets Ion at fixed voltage2 · Opposite strain per typeelectrons and holes want different latticesnMOS — tensile (pull apart)gatechannel stretched → fast electronspMOS — compressive (SiGe pushes in)SiGeSiGegatechannel squeezed → fast holesBigger Ge atoms in the source/draincompress the pMOS channel; a tensilecap film stretches the nMOS one.Same die, opposite strain, both faster.3 · How strain is built inthe process levers — since ~90nmEmbedded SiGe S/D (pMOS)recessed source/drain refilled withSiGe to compress the channel.Tensile CESL nitride (nMOS)a stressed contact-etch-stop linerpulls the channel into tension.Stress-memorization annealstrain locked in during recrystallizationof the source/drain.Why it stuck aroundA "free" performance boost: more speedat the same gate length. Still used insideFinFET and nanosheet channels today, nowvia 3D-aware stressor engineering.Tensile → nMOSStretching the lattice speeds upelectrons — the majority carrier.Compressive → pMOSSqueezing the lattice speeds upholes — via embedded SiGe.Mobility = speedHigher µ lifts drive current withouta smaller, leakier transistor. ``` **Carrier Mobility** — the speed at which electrons or holes move through a semiconductor when an electric field is applied, directly determining transistor switching speed. **Definition** $$\mu = \frac{v_d}{E}$$ Where $v_d$ is drift velocity and $E$ is electric field. Units: cm²/(V·s) **Typical Values (Silicon at 300K)** - Electron mobility: ~1400 cm²/(V·s) - Hole mobility: ~450 cm²/(V·s) - This is why NMOS (electron carriers) is ~3x faster than PMOS (hole carriers) **Factors Affecting Mobility** - **Temperature**: Higher T → more lattice scattering → lower mobility - **Doping**: Higher doping → more impurity scattering → lower mobility - **Electric field**: Very high fields → velocity saturation (~10⁷ cm/s) - **Crystal orientation**: <100> vs <110> planes have different mobilities **Mobility Enhancement Techniques** - **Strained Silicon**: Apply tensile strain (for NMOS) or compressive strain (for PMOS) to the channel. 30-50% mobility improvement - **High-mobility channels**: Ge (2x electron, 4x hole), InGaAs (10x electron). Used in research - **FinFET fin orientation**: Choose crystal direction for optimal mobility **Why Mobility Matters** - Higher mobility → higher drive current → faster switching → higher frequency - $I_{on} \propto \mu$ — drive current directly proportional to mobility **Carrier mobility** is the physical foundation of transistor speed — every generation's performance gains partly come from mobility engineering.

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