etch profile control
**Etch Profile Control** is the **engineering of plasma etch conditions to achieve the target feature shape** — balancing anisotropy (vertical profile), selectivity (stop on the right layer), CD control (precise dimensions), and uniformity (consistent across the wafer) for every patterning step in semiconductor manufacturing.
**Key Profile Parameters**
- **Sidewall Angle**: 90° = perfectly vertical (ideal for most features). 85-88° = slight taper (aids metal fill).
- **CD (Critical Dimension)**: Width at bottom, middle, and top of feature. CD bias = amount the etch changes the lithographic CD.
- **Selectivity**: Etch rate of target material ÷ etch rate of mask/underlayer. Higher = better.
- **Uniformity**: CD and depth variation across wafer (typically < 2% for production).
**Achieving Anisotropy**
**Ion-Assisted Anisotropy**:
- Ions accelerated perpendicular to wafer by DC bias → vertical etch.
- Horizontal surfaces get bombarded → etch fast.
- Vertical sidewalls get minimal ion bombardment → etch slow.
- Higher bias = more anisotropic but more damage.
**Polymer Passivation**:
- Fluorocarbon gases (CHF3, C4F8) deposit polymer on all surfaces.
- Ion bombardment removes polymer from horizontal surfaces (etch continues).
- Polymer remains on vertical sidewalls (protects from lateral etch).
- Polymer thickness controls CD bias and profile taper.
**Common Etch Chemistries**
| Material | Chemistry | Selectivity To |
|----------|----------|----------------|
| SiO2 etch | C4F8/Ar/O2 | Si (>20:1), SiN (>5:1) |
| Si etch | Cl2/HBr/O2 | SiO2 (>50:1) |
| SiN etch | CH2F2/O2 | SiO2 (>10:1) |
| Metal (TiN) | Cl2/BCl3/Ar | Dielectric (>5:1) |
| Organic (resist) | O2/N2 | Inorganic (>100:1) |
**Profile Problems and Solutions**
- **Bowing**: Excessive passivation at top, less at mid-depth → barrel shape. Fix: reduce polymer deposition gas.
- **Notching**: Charge accumulates at insulating interfaces → lateral etch at interface. Fix: pulsed plasma.
- **Microtrench**: Ions reflect off sidewalls → over-etch at foot. Fix: lower bias, more polymer.
- **Tapered profile**: Insufficient passivation → lateral etch at top. Fix: increase C4F8, lower O2.
- **Inverse taper**: Too much passivation → narrowing at top. Fix: increase O2 to reduce polymer.
Etch profile control is **the art and science that translates lithographic patterns into functional device structures** — every transistor, contact, via, and metal line in a chip is defined by plasma etching where the balance of chemistry, ion energy, and passivation determines whether the chip works or fails.