GAA Nanosheet 2020s Release Nanosheets Selective Sige Etch Process

# Gate-All-Around / Nanosheet Transistors (2020s): Step 5 — Release the Nanosheets With a Selective SiGe Etch

## 1. The Step That Makes GAA Geometrically Possible

This is the genuinely new unit process GAA introduces, with no equivalent anywhere in FinFET fabrication: a highly selective, typically dry or vapor-phase chemical etch (commonly based on hydrogen-chloride or similar halogen chemistries at controlled temperature) that removes the sacrificial SiGe layers from between the Si nanosheets, while leaving the Si channel layers themselves almost entirely intact. After this step, each Si nanosheet is suspended, held in place only at its source and drain ends, with open space where the SiGe used to be.

## 2. Why Selectivity, Not Just Etch Rate, Is the Entire Challenge

An etch that removed SiGe quickly but also attacked Si at even a low rate would thin or damage the channel layers that are the whole point of the process; one that protected Si perfectly but removed SiGe too slowly would leave residual sacrificial material blocking the gate wrap. Selectivity ratios of many tens-to-one between SiGe and Si removal rates are required, and that ratio is exactly what Step 3's germanium-fraction choice was tuned to support.

## 3. A Lateral Etch Into a Narrow, Enclosed Gap

Unlike many etches that proceed from an open top surface, this etch must work laterally, reaching into the narrow gap between two already-close Si sheets from the exposed edge Step 4's patterning created. As sheet-to-sheet spacing tightens to pack more sheets into the same stack height, the etchant has to travel further into an increasingly narrow, diffusion-limited channel to fully clear the SiGe at the center of a wide sheet — a direct tension between the vertical sheet-count stacking this series covers later (Step 10) and how completely this etch can clear each gap.

## 4. What a Suspended Sheet Still Needs Before Gate Fill

A released sheet, held only at its ends, is mechanically the most fragile state the device passes through in the entire flow — and electrically, its source/drain ends are now exposed in the same gap the gate metal will eventually fill, with no barrier between them yet. That specific problem, shorting risk between the replacement gate and the source/drain, is what the very next step in this series addresses directly, before gate deposition is attempted.

Selectivity Required Versus Sheet Spacing SiGe:Si etch selectivity ratio needed to fully clear the gap, as inter-sheet spacing tightens selectivity ratio needed to fully clear the center of a wide sheet typical achievable selectivity ceiling for a given SiGe chemistry tight spacing can push the requirement above the achievable ceiling tighter inter-sheet spacing raises the selectivity bar the etch chemistry must clear this is the direct tension against the sheet-stacking density lever covered later in this series
Before and After the Release Etch the structural state of the superlattice stack, immediately before and immediately after BEFORE: SOLID STACK Si and SiGe layers alternate with no gap; mechanically rigid, electrically still blocked DURING: LATERAL CLEARING etchant works inward from the exposed edge, removing SiGe while sparing Si AFTER: SUSPENDED SHEETS each Si sheet held only at source/drain ends; open, unprotected gap where gate metal will go an open, unprotected gap next to exposed source/drain ends is exactly what inner spacers address next

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