SiC Vertical MOSFET Cross Section

# Why SiC Goes Vertical and GaN Goes Lateral — Then Where Each Wins

two structures answering the same silicon material ceiling in different directions

TWO STRUCTURES, TWO CURRENT PATHS SiC power MOSFET — vertical gate / MOS channel (top) 4H-SiC drift region (blocks voltage, sets Ron) drain contact (backside) current flows top ↓ to bottom whole wafer thickness carries current — bulk substrate GaN HEMT — lateral source drain gate 2DEG channel thin GaN epitaxial layer silicon substrate — support + heat path only current flows sideways, along the 2DEG SiC's vertical path scales with wafer thickness; GaN's lateral path scales with gate-to-drain spacing 2DEG forms with no doping at all — which is why a bare GaN HEMT is normally-on

SiC's bulk-grown vertical structure favors high blocking voltage; GaN's epitaxial lateral structure favors high switching frequency at lower voltage.

GaN's normally-on 2DEG is fixed two ways: a cascode pairs it with a small silicon MOSFET (fastest to market); a native p-GaN gate depletes the 2DEG directly (closer to full HEMT speed).

WHERE EACH MATERIAL WINS blocking voltage vs. switching frequency — the two axes that decide the choice blocking voltage → switching frequency → SiC EV traction, solar, industrial high V, moderate switching GaN fast chargers, data centers, RF lower V, highest switching silicon MOSFET / IGBT broad legacy coverage, being displaced at the edges neither wide-bandgap material replaces silicon everywhere — each displaces it only where its axis wins

Both extend — not replace — the silicon Power MOSFET/IGBT lineage this series follows on from

Take sic vertical mosfet cross section further

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