length of diffusion (lod) effect

**LOD (Length of Diffusion) Effect** is a **layout-dependent effect where the distance from a transistor's channel to the nearest STI edge affects its performance** — because the compressive stress from STI changes carrier mobility, and this stress depends on the active area (OD) length. **What Causes the LOD Effect?** - **Mechanism**: STI (SiO₂) has a different thermal expansion coefficient than Si. After anneal, the STI exerts compressive stress on the active silicon. - **Short OD**: More stress (STI edges closer to channel) -> mobility change. - **Long OD**: Less stress (STI edges far from channel) -> different mobility. - **Asymmetry**: SA (source-side OD length) and SB (drain-side OD length) affect stress independently. **Why It Matters** - **Analog Design**: Two transistors with different OD lengths have different $I_{on}$ and $V_t$ even if $W/L$ is identical. - **Standard Cells**: Different logic cells have different SA/SB -> systematic performance variation. - **Modeling**: BSIM models include SA, SB parameters to capture LOD in SPICE simulation. **LOD Effect** is **the stress fingerprint of layout** — where the geometry of the active area directly controls the mechanical stress felt by the channel.