lock-in thermography

Lock-in thermography (LIT) is a non-destructive thermal imaging technique that detects localized heat sources in integrated circuits, used to find electrical shorts, high-resistance defects, and leakage paths. Operating principle: apply periodic (lock-in) voltage stimulus to the device while an infrared camera captures thermal emissions—signal processing extracts the tiny temperature variations (micro-Kelvin sensitivity) synchronous with the stimulus frequency. Lock-in advantage: by modulating the stimulus and averaging over many cycles, LIT achieves signal-to-noise ratios 100-1000× better than steady-state thermography—can detect nanowatt-level power dissipation. Imaging modes: (1) Amplitude image—shows magnitude of thermal signal (heat source intensity); (2) Phase image—shows timing delay between stimulus and thermal response (indicates depth of defect). Applications: (1) Gate oxide shorts—localized leakage through thin dielectric; (2) Junction leakage—abnormal p-n junction current; (3) Latch-up sites—parasitic thyristor activation; (4) Resistive opens—high-resistance connections generating heat; (5) ESD damage—latent damage sites; (6) Power device analysis—current crowding, thermal hotspots. Spatial resolution: limited by IR camera (~3-5μm for InSb detectors at 3-5μm wavelength), improved by backside analysis through thinned silicon. Frontside vs. backside: backside through silicon (transparent at IR wavelengths >1μm) avoids metal obstruction, better for advanced multi-metal devices. Integration with other FA: LIT localizes defect region → SEM/FIB for detailed investigation → root cause identification. Non-destructive nature makes LIT ideal as an early-stage fault localization technique before committing to destructive analysis methods.