Mesa Production 1958 Qualify Incoming Silicon Uniformity

# Qualify Incoming Silicon for Production-Grade Uniformity: Trusting a Supplier Instead of Trusting One Wafer

## 1. Why a Vendor's Word Is Not the Same as a Measurement

This step inspects every incoming lot of silicon wafers from Fairchild's crystal supplier before any of it enters the production line, checking resistivity, crystal orientation, and surface finish against a written specification — because the 1956 and 1957 series could each afford to select or reject one wafer at a time, while a volume line cannot afford to discover a bad crystal-pulling run only after it has already been diffused, masked, etched, and diced. Resistivity varies along the length of a single pulled ingot as dopant rejects unevenly into the melt during growth, so even wafers from the same ingot are not identical, and the fraction of an incoming lot that actually meets specification is itself something this step must measure rather than assume:

$$\rho(x) = \rho_0\,(1-x)^{k-1}, \qquad f_{\text{accept}} = \int_{\rho_{\min}}^{\rho_{\max}} g(\rho)\, d\rho$$

where $\rho(x)$ is resistivity as a function of fractional ingot position $x$ under the segregation coefficient $k$, and $f_{\text{accept}}$ is the fraction of a lot's measured resistivity distribution $g(\rho)$ that falls inside the acceptable window. Because $k$ is rarely exactly one for the dopants used here, resistivity drifts systematically from the seed end of an ingot to its tail — which means accepting or rejecting a *wafer* is really a decision about *where in the ingot* that wafer came from, a fact invisible to anyone who only inspects the finished wafer in isolation.

One Ingot, a Drifting Resistivity, Many Wafers resistivity against fractional position along the pulled crystal RESISTIVITY VERSUS INGOT POSITION fractional ingot position, x (seed → tail) → ρ ρ max ρ min acceptable window too low, reject too high, reject ρ(x) = ρ₀(1−x)k−1 — where in the ingot a wafer came from predicts whether it passes a lot's accept fraction is a property of the crystal, not of any one wafer in it

## 2. Real Diagram: Sampling the Lot, Not Just the Top Wafer

A production line cannot measure every wafer in every incoming lot without slowing itself to a crawl, so this step samples a fraction of each lot and infers the rest. The risk this creates is specific: a sampling scheme that happens to draw from the acceptable middle of several ingots can pass a lot whose extremes are actually out of specification.

Sampling the Middle Can Hide the Ends one ingot, sliced into wafers, sampled at a few points seed end, low ρ tail end, high ρ sampled, in spec sampled, in spec sampled, in spec not sampled, actually out of spec not sampled, actually out of spec a sampling plan that misses the ends passes a lot the ends would have failed

## 3. Why Starting Material Was a Settled Question Before This Project Reached Volume

The 1956 drift-transistor series spent its very first step selecting and preparing a single silicon wafer, and that selection, once made, was done — the chosen wafer simply was the input to every step that followed. This step performs a structurally similar check, but it cannot stop at one wafer, because a production line consumes many wafers from many ingots continuously, and the question is no longer "is this particular wafer good" but "what fraction of this incoming supply can be trusted, and how do we know without measuring every piece." That is a sampling and statistics problem layered on top of a materials problem, and it is the first step in this project where the *supplier's* process, not just the device process, becomes something this project's own process has to characterize and qualify.

Step 3 does not change anything about the silicon itself; it decides how much of Fairchild's incoming supply this production line is willing to trust, before any of it has had the chance to waste a single diffusion, mask, or etch on material that was already out of spec before it arrived.

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