Micrologic 1960 Route Interconnect Whole Circuit Planar
# Route Interconnect Across a Whole Circuit Instead of One Device: What Happens When Two Wires Need to Cross
## 1. Why a Single Metal Layer Turns Routing Into a Geometry Problem
This step extends the metal patterning technique the 1959 series established at its own Step 6 across the entire circuit's connectivity, routing every transistor contact, every resistor terminal, and every isolation-island boundary into the one Boolean function Step 1's layout specified — and because this process has exactly one patterned metal layer, two interconnect lines are never allowed to cross, on pain of shorting two nodes of the circuit together that were never supposed to touch. A circuit's wiring is, mathematically, a graph connecting components, and a graph can be drawn on a flat surface without any of its connections crossing only if that graph is planar — a property not every circuit's natural connectivity happens to have:
where $V$ is the number of distinct nodes the circuit needs connected, $E$ the number of required connections between them, and $N_{\text{crossunders}}$ the minimum number of connections that cannot be routed in one flat metal layer without crossing another. Every connection this inequality forces past the planar limit needs a different physical path entirely — not more metal, but a diffused region running *underneath* the metal layer, carrying one signal beneath a point where another signal's metal line needs to pass directly over it.
## 2. Real Diagram: A Diffused Path Running Beneath the Metal That Crosses It
Where two interconnect lines need to cross, this step routes one of them through a short diffused region instead of metal — dipping below the surface, under the oxide, and back up on the other side, so the metal line crossing above it never actually touches it.
## 3. Why Routing Became a Problem Only Once the Layout Had to Connect, Not Just Protect
The 1959 series' own metal patterning step wired exactly one device to the outside world, and the gap it had to avoid shorting was a single, simple distance between two contacts on the same device. This step wires an entire circuit's worth of nodes together, and the question it faces — can every required connection actually be drawn without one line crossing another — never had a reason to exist until a layout needed to connect more than one component to more than one other component at once. The diffused crossunder this step introduces is not a new fabrication technique; it borrows directly from the same diffused-region vocabulary Step 2 and Step 4 already used for resistors, applied here to a signal that simply needs to get from one side of a crossing metal line to the other without touching it.
Step 5 does not change what any single device does; it decides, for the first time in this project's history, whether a circuit's own logical structure can actually be drawn on one flat piece of silicon at all.