Micrologic 1960 Step 11 Universal NOR Gate Topology

# Build Micrologic Around One Universal NOR Gate: Why a Single Gate Type Had to Do Every Job

## 1. Why Stocking One Circuit Topology Beats Stocking a Dozen

This step states the logic-design decision underneath every chip this series has fabricated since Step 1: Micrologic is not a catalog of different gate types each wired for its own function, it is one circuit topology, the resistor-transistor NOR gate, repeated and interconnected until it performs whatever Boolean function a customer needs. A direct-coupled resistor-transistor pair pulls an output low whenever any one of several input transistors is driven high, which is exactly the NOR function, and because NOR is functionally complete, any other gate a customer might ask for — AND, OR, NAND, a flip-flop, a counter stage — can be built by wiring several NOR primitives together rather than by diffusing a different layout for every truth table a catalog might otherwise need.

$$\text{NOR}(A,B,\ldots) = \overline{A+B+\cdots}, \qquad \text{AND, OR, NAND, flip-flop} \subset \langle \text{NOR} \rangle$$

where the right-hand set denotes every function reachable by composing NOR gates alone — a single diffusion-and-mask recipe, proven once in Step 6's truth-table verification, is enough to realize the entire angle bracket, so the fabrication line this series has built never has to be retooled for a new function, only rewired at the interconnect layer Step 5 established.

One Primitive, Every Function NOR gates composed into AND, OR, NAND, and sequential functions NOR IS FUNCTIONALLY COMPLETE NOR gate the one diffused primitive AND gate OR gate NAND gate flip-flop stage every customer function, wired from the same gate one mask set serves every catalog part number this series will ship

## 2. Real Diagram: Direct-Coupled Transistor Logic, One Input Fan-In at a Time

Each NOR gate primitive is a direct-coupled resistor-transistor circuit: a load resistor pulls the output toward the supply, and any one of several parallel input transistors, when driven on, pulls the shared output node down. No diode, no coupling capacitor, and no extra component Step 1 would have had to lay out separately is needed to add another input — fan-in grows by adding another transistor in parallel at the same output node.

Direct-Coupled Transistor Logic a load resistor and parallel input transistors sharing one output node load R supply output node, shared T1 T2 T3, added more inputs means more transistors at one node, never a new topology

## 3. Why a Catalog of Special-Purpose Gates Would Have Collapsed Under Its Own Variety

A chip line that diffused a different layout for every truth table a customer wanted would have multiplied Step 7's whole-chip yield problem by the number of distinct mask sets in production, each with its own defect rate, its own test program, and its own qualification record against Step 9's military specification. Standardizing on one NOR primitive instead means every mask revision, every yield improvement, and every reliability lesson learned on one gate transfers directly to every other function this series ships, because every other function is the same gate, wired differently.

Step 11 does not add a new circuit to this series; it names the one circuit every prior step has quietly been building toward, and explains why a single gate, repeated, was always going to out-compete a wider catalog of special-purpose parts.

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