MOSFET Scaling 1970s Bound Subthreshold Leakage Current

# MOSFET Scaling (1970s): Step 15 — Bounding Subthreshold Leakage Current

Off-state current stops being negligible once threshold margins tighten. A MOSFET nominally 'off' below threshold still conducts a small exponentially-decaying subthreshold current, which was negligible at 1960s device geometries and threshold margins but grows into a real design constraint once threshold rolloff (step 12) and tightening process variation push some devices' effective threshold closer to zero. Step 15 covers the subthreshold conduction mechanism and why 1970s designs had to start budgeting for it explicitly.

## 1. The Subthreshold Current-Voltage Relationship

Below threshold, drain current follows an approximately exponential relationship with gate voltage, I_D is proportional to exp(V_GS / (n * V_T_thermal)), where V_T_thermal is the thermal voltage kT/q and n is a slope factor set by device capacitances; this gives a characteristic 'subthreshold slope' usually expressed in millivolts of gate voltage needed per decade of current change. A device with a well-behaved slope might need roughly 70-100 mV of gate swing per decade of current drop — meaning even a modest reduction in effective threshold (from rolloff, from process variation, from the heavier channel doping tradeoffs of steps 12-13) can measurably raise the off-state leakage floor.

## 2. Real Diagram: Subthreshold Current vs. Gate Voltage, Shifted by Rolloff

Subthreshold Leakage Current vs. Gate Voltage rolloff-shifted threshold raises the off-state leakage floor at a fixed gate voltage of zero gate voltage (0 = nominal off state) drain current (log scale, normalized) nominal (long-channel) threshold rolloff-shifted threshold the same zero gate voltage now sits further up the exponential subthreshold curve after rolloff

## 3. Why This Mattered More for Dense Chips Than for Individual Devices

A single transistor's subthreshold leakage is tiny in absolute terms, but a chip with thousands of transistors sums that leakage across every nominally-off device simultaneously, and static power budgets (already a design constraint for battery-powered calculator chips, a major 1970s MOS application) start to feel the aggregate effect well before any individual device's leakage looks alarming in isolation. This is the first place in this series where a per-device effect becomes a chip-level concern purely through multiplication by transistor count — a preview of a theme that dominates later scaling eras.

## 4. 1970s Design Responses

Responses available at the time were mostly margin-based rather than structural: keep the Vt-adjust implant (step 10) tuned toward slightly higher nominal threshold on the shortest devices to compensate for expected rolloff, tighten channel-length process control (reducing the spread of effective channel lengths and therefore the spread of effective thresholds), and set conservative standby-current test limits to catch lots drifting toward excessive subthreshold leakage before shipment.

## 5. Companion Diagram: Stage Sequence and Trend Summary

MOSFET Scaling (1970s): Step 15 stage sequence and schematic outcome trend for this step The Subthreshold Cu… 1 Real Diagram: Subth… 2 Why This Mattered M… 3 1970s Design Respon… 4 sequence progression outcome trend (schematic) companion diagram: stage sequence and schematic trend for this step

## Bounding Subthreshold Leakage Current's Place in the Process Lineage

This is step 15 of 20 in the MOSFET Scaling (1970s) series, tracing planar NMOS scaling from early 1970s field pressure through the fixed-voltage-scaling break that opens the adjacent HMOS (1978) series.

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