3D NAND

# The Macaroni Channel: a Cylindrical Transistor

## 7. 7. The Macaroni Channel a Cylindrical Transistor

The silicon channel that carries current through a 3D NAND string is not a flat strip like a planar transistor's channel; it is a hollow or filled cylinder running vertically through the entire stack of layers, a shape the industry nicknamed the "macaroni" structure for its resemblance to a tube of pasta. A thin layer of polysilicon is deposited to coat the inside wall of a vertical hole etched through the whole layer stack (the etch itself is covered in a later step), forming a tube; depending on the specific process, that tube's hollow core is then either left as an air gap or filled with an insulating oxide core for mechanical and electrical stability. The ONO film stack from the previous step sits between this polysilicon channel and the surrounding control-gate material at every layer the channel passes through. Current during a read or program operation flows vertically along this cylindrical channel wall, and at each memory layer, the word line wrapped around the outside of that layer's section of the macaroni acts as the control gate for one memory cell — turning what used to be a flat, lithography-patterned transistor into a vertical, gate-all-around transistor repeated at every layer along a single tube.

From a Flat Channel to a Vertical Macaroni Tube 7. The Macaroni Channel a Cylindrical Transistor PLANAR CHANNEL Flat strip of silicon between source and drain Current flows horizontally across the wafer surface MACARONI CHANNEL Thin polysilicon tube lining a vertical etched hole Hollow core left as air gap or filled with insulating oxide Current flows vertically along the tube wall the channel turns ninety degrees and becomes a tube, not a strip
One Macaroni Tube, One Word Line Per Layer It Passes 7. The Macaroni Channel a Cylindrical Transistor THE TUBE ONO stack lines the tube wall at every layer THE WORD LINE AT EACH LAYER Wraps fully around the tube's outside at that layer Acts as the control gate for one memory cell there THE RESULT A gate-all-around transistor repeated at every layer All stacked along the same single vertical tube gate-all-around geometry, repeated layer after layer along one channel

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