photomask
**Photomasks (Reticles)** are the **precision quartz plates containing the circuit pattern that is projected onto the wafer during lithography** — serving as the master stencil from which billions of chips are printed, where a single mask set for an advanced node can cost $15-30 million and requires defect-free patterning at tolerances 4x tighter than the final wafer features.
**Mask Structure**
- **Substrate**: Ultra-flat fused silica (quartz) plate, 6" × 6" × 0.25" (152 mm square).
- **Absorber**: Chrome (DUV) or tantalum-based (EUV) thin film patterned with circuit features.
- **Pellicle**: Thin transparent membrane mounted ~6 mm above mask surface — keeps particles out of focal plane.
- **4x Reduction**: Mask features are 4x larger than wafer features (stepper demagnifies 4:1).
**Mask Types**
| Type | Absorber | Lithography | Used For |
|------|----------|------------|----------|
| Binary (COG) | Chrome on glass | DUV (248nm, 193nm) | Non-critical layers |
| Phase-Shift (AttPSM) | Partially transmitting | DUV 193nm | Critical layers |
| Alternating PSM | Etched quartz + chrome | DUV 193nm (legacy) | Tight pitch features |
| EUV Mask | TaN absorber on Mo/Si multilayer | EUV 13.5nm | Leading-edge layers |
**EUV Mask (Reflective)**
- Unlike DUV masks (transmissive), EUV masks are reflective — light bounces off the mask.
- **Multilayer mirror**: 40-50 alternating Mo/Si bilayers (each ~7 nm) — reflects 67% of EUV light.
- **Absorber**: TaN (tantalum nitride) patterned on top of mirror — absorbs EUV where dark features are needed.
- **No pellicle (mostly)**: EUV pellicle technology still maturing — most EUV masks run without pellicle.
- **Flatness**: < 50 nm peak-to-valley across the entire 6" plate.
**Mask Fabrication Process**
1. **Blank preparation**: Ultra-pure quartz plate with absorber film deposited.
2. **E-beam writing**: Electron beam lithography writes the pattern (5-50 hrs per mask).
3. **Etch**: Pattern transferred into absorber layer.
4. **Inspection**: Full-mask inspection for pattern defects (KLA Teron, Lasertec).
5. **Repair**: Focused ion beam (FIB) or e-beam repairs defects.
6. **Metrology**: CD measurement, registration accuracy verification.
7. **Pellicle mount**: Transparent membrane attached (DUV masks).
**Mask Cost**
| Node | Mask Layers | Cost per Mask Set |
|------|------------|------------------|
| 28nm | 30-40 | $2-5 million |
| 7nm (DUV+EUV) | 60-80 | $10-15 million |
| 3nm (EUV) | 80-100 | $15-30 million |
- A single EUV mask: $300K-500K.
- Mask cost drives up NRE (non-recurring engineering) — discourages low-volume chips.
Photomasks are **the most expensive and precision-critical consumable in semiconductor manufacturing** — the accuracy of every feature on every chip depends on the mask, making mask technology a fundamental enabler and cost driver of Moore's Law advancement.