Planar Process 1959 Pattern Metal Interconnect Photolithography

# Pattern the Metal Into Interconnect Lines by a Second Photolithographic Mask: The Same Undercut, a New Way to Fail

## 1. Why the Gap Between Two Contacts Now Carries the Risk the Window Used to Carry

This step runs a second complete photolithographic cycle over the blanket metal Step 5 deposited — photoresist, alignment, exposure, development — then etches the exposed aluminum in a wet chemical bath, leaving metal only where this design wants an interconnect lead and removing it everywhere else, including the narrow gap between the base contact and the emitter contact that Step 4's two separate windows placed close together. The metal etch is isotropic in the same way every etch this project has documented has been, undercutting the resist edge by some characteristic amount on each side — but the consequence of that undercut has moved. Earlier etches in this project risked widening a window into territory that mattered for diffusion or for junction coverage; this etch risks narrowing the gap between two conductors until they touch, which would short the base and emitter together as surely as any diffusion error ever shorted a junction:

$$w_{\text{gap, final}} = w_{\text{gap, resist}} - 2\,x_{\text{metal undercut}}, \qquad w_{\text{gap, final}} > 0$$

where $w_{\text{gap, resist}}$ is the gap width the photoresist mask defines between the two metal lines and $x_{\text{metal undercut}}$ the lateral etch distance into each line's edge. The requirement is simple to state and easy to violate: if the undercut on both sides together ever reaches the resist-defined gap width, the two lines merge into one, and a transistor whose base and emitter are electrically shorted together is not a marginal failure — it is not a transistor at all.

The Gap Shrinks, the Same Way a Window Used to Grow undercut now eats a gap instead of widening an opening TOP VIEW, TWO METAL LINES AFTER ETCH base contact emitter contact wgap, final undercut eats inward from both resist edges wgap, final = wgap, resist − 2xmetal undercut — must stay positive, or this is not a transistor the same undercut math this project has used since 1957, now protecting a gap instead of a window

## 2. Real Diagram: What a Finished Interconnect Pattern Actually Looks Like

After this etch, the wafer surface carries a deliberate pattern: metal leads running from each contact window out across the field oxide to wherever this circuit needs them to go, with bare oxide standing in every gap the design calls for. This is the first time in this project's history that metal itself, rather than silicon or a diffused region, has been patterned into a shape that matters.

Metal Finally Carries Its Own Pattern leads routed across the field oxide, gaps left exactly where the circuit needs them base lead, routed to a pad emitter lead, routed to a pad gap, deliberate the route, not just the contact, is now part of what photolithography decides

## 3. Why Metal Has Never Before Been the Thing This Project Patterned

Every photolithography step this project has documented before this one — across 1957 and the early steps of this series — patterned either photoresist over silicon dioxide or photoresist over bare silicon, always in service of deciding where a dopant or an etch would act on the semiconductor itself. This step patterns a conductor. The dopant underneath this metal is already fixed, the junction underneath the field oxide is already protected, and nothing about the silicon changes as a result of this step at all — what changes is the electrical wiring layout sitting on top of it, which is a genuinely new category of thing for this project's masking technique to control. That shift, from patterning the semiconductor to patterning the wiring on top of it, is a small step in this series but a conceptually large one for the project as a whole: it is the first hint that photolithography's real future use was never going to be limited to shaping junctions.

Step 6 does not touch the transistor Steps 1 through 5 already finished building; it decides, for the first time in this project's history, how that finished transistor gets to talk to the rest of a circuit.

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