selective etch
**Selective Etch** is a wet or dry chemical process that removes one material at a significantly higher rate than adjacent materials, exploiting differences in chemical reactivity to isolate or expose specific layers within a semiconductor device stack. Selectivity ratios—defined as the etch rate of the target material divided by the etch rate of the stop material—can range from 10:1 to over 1000:1 depending on chemistry and materials.
**Why Selective Etch Matters in Semiconductor Manufacturing:**
Selective etching is fundamental to both device fabrication and failure analysis because it enables **precise layer-by-layer removal** without damaging underlying or adjacent structures.
• **Material-specific removal** — Hot phosphoric acid (H₃PO₄ at 160°C) removes Si₃N₄ with >40:1 selectivity over SiO₂; buffered HF (BOE) removes SiO₂ with >100:1 selectivity over Si₃N₄
• **Endpoint on interfaces** — High selectivity provides natural etch stops at material boundaries, enabling reproducible deprocessing to specific layers without precise timing requirements
• **Failure analysis deprocessing** — Sequential selective etches strip passivation, ILD, and metallization layers individually, preserving each layer for inspection before removing it
• **Gate stack processing** — Selective removal of dummy gates (poly-Si over high-k) in replacement metal gate (RMG) flows requires >1000:1 selectivity to protect thin gate dielectrics
• **Isotropic undercut control** — Lateral selectivity enables controlled undercut for release structures in MEMS fabrication and for accessing buried defects in FA cross-sections
| Etchant | Target Material | Stop Material | Selectivity |
|---------|----------------|---------------|-------------|
| BOE (6:1) | SiO₂ | Si₃N₄ | >100:1 |
| Hot H₃PO₄ (160°C) | Si₃N₄ | SiO₂ | >40:1 |
| KOH (30%, 80°C) | Si (100) | SiO₂ | >200:1 |
| HF:HNO₃:CH₃COOH | Silicon | SiO₂ | >50:1 |
| H₂O₂:NH₄OH (SC-1) | Organics/metals | Si, SiO₂ | High |
**Selective etching is the cornerstone of both precise device fabrication and systematic failure analysis deprocessing, enabling controlled material removal with predictable, reproducible endpoints at every interface in the semiconductor stack.**