semiconductor mask shop

**Photomask Manufacturing** is the **precision fabrication process that creates the master optical templates used in semiconductor lithography — patterning chromium absorber layers on ultra-flat quartz substrates with nanometer accuracy using electron-beam writing, then inspecting and repairing every defect, producing the most dimensionally accurate manufactured objects in existence where pattern placement must be controlled to within 1-2nm across a 150mm square plate**. **What a Photomask Is** A photomask (reticle) is a fused silica (quartz) plate — typically 6" × 6" × 0.25" (152mm × 152mm × 6.35mm) — with a patterned chrome layer that selectively blocks or transmits 193nm or 13.5nm light. The lithography scanner projects the mask pattern onto the wafer at 4x reduction, so mask features are 4x larger than wafer features (a 20nm wafer feature requires an 80nm mask feature). A single advanced node chip requires 80-100 masks (one per patterning layer). **Mask Blank Preparation** - **Substrate**: Synthetic fused silica with exceptionally low thermal expansion coefficient (0.5 ppm/°C). Flatness specification: <50nm total indicated reading across the entire plate. Surface roughness: <0.15nm RMS. - **Absorber Deposition**: Sputtered chrome (for DUV masks) or ruthenium/tantalum-based multilayer (for EUV masks) with thickness uniformity ±0.5%. - **Resist Coating**: Chemically amplified e-beam resist spun to 100-300nm thickness with ±1% uniformity. **E-Beam Writing** Mask patterns are written by scanning a focused electron beam across the resist-coated blank. Two primary tool types: - **Variable Shaped Beam (VSB)**: Shapes each flash as a rectangle of variable size. Each shape requires one flash. A complex mask can require 10-50 billion flashes, taking 10-30 hours to write. Used for the most critical masks. - **Multi-Beam Mask Writer (MBMW)**: 262,144 parallel electron beams write simultaneously (IMS Nanofabrication). Reduces write time by 10-100x while maintaining sub-nm edge placement accuracy. Essential for EUV masks with complex curvilinear ILT patterns. **Inspection and Repair** - **Mask Inspection**: 193nm or 13.5nm wavelength inspection tools scan the entire mask comparing die-to-die or die-to-database. Must detect defects as small as 20nm on the mask (5nm at wafer level). Cost: $30-50M per inspection tool. - **Defect Repair**: Femtosecond laser ablation removes unwanted chrome. Focused Ion Beam (FIB) or electron-beam-induced deposition adds missing chrome. Each repair must preserve pattern fidelity to within CD tolerance. **EUV Mask Differences** EUV masks are reflective (multilayer Mo/Si Bragg mirror) rather than transmissive. The absorber is a thin TaBN/Ta layer on top of the mirror. Reflective architecture means defects in the mirror substrate also print, requiring defect-free blanks — the most critical supply chain constraint for EUV lithography. Photomask Manufacturing is **the art of perfection at the nanometer scale** — creating the original templates from which every chip is copied, where a single undetected defect on one mask can replicate itself across millions of wafers and billions of dies.