semiconductor supply chain geopolitics

**Semiconductor Supply Chain Geopolitics** describes the **strategic reality that the world's most advanced chip manufacturing is concentrated in Taiwan (TSMC, >60% of global foundry revenue, >90% of sub-7nm production) and a handful of other locations — creating a single point of failure for the global technology ecosystem that has triggered massive government-funded reshoring efforts (US CHIPS Act $52.7B, EU Chips Act €43B, Japan ¥3.9T) to diversify manufacturing capacity and reduce dependence on geographically concentrated production**. **The Concentration Problem** - **Leading-Edge Logic**: TSMC (Taiwan) and Samsung (South Korea) are the only foundries capable of manufacturing at 5nm and below. Intel is ramping 18A/14A in the US and Ireland but trails by 2-3 years. If TSMC's fabs in Taiwan were disrupted (natural disaster, geopolitical conflict), the global supply of advanced chips — smartphones, GPUs, AI accelerators, military systems — would halt immediately. - **EUV Lithography Equipment**: ASML (Netherlands) is the sole manufacturer of EUV scanners. Zero alternatives. Each scanner contains 100,000+ parts from 5,000+ suppliers across 60 countries. - **Advanced Packaging**: TSMC (CoWoS, InFO) and ASE (Taiwan) dominate advanced packaging. HBM packaging is concentrated at SK Hynix (South Korea) and Samsung. - **Specialty Materials**: Photoresists (JSR, TOK — Japan), silicon wafers (Shin-Etsu, SUMCO — Japan), CMP slurries (CMC Materials — US, Fujimi — Japan). Deep supply chains with single-source dependencies at multiple tiers. **Reshoring Initiatives** - **US CHIPS Act (2022)**: $39B in manufacturing incentives + $13.2B for R&D. TSMC building 3 fabs in Arizona (4nm, 3nm, 2nm). Samsung building in Taylor, TX. Intel expanding in Arizona, Ohio, New Mexico. - **EU Chips Act (2023)**: €43B to double EU semiconductor market share to 20% by 2030. TSMC fab in Dresden (Germany), Intel fabs in Magdeburg (Germany). - **Japan**: ¥3.9T+ in subsidies. Rapidus (2nm logic with IBM technology), TSMC fab in Kumamoto (JASM, 12-28nm). - **India**: $10B incentive program. Tata Electronics + PSMC (300mm fab), Micron (assembly and test). **Cost of Reshoring** A leading-edge fab costs $20-30B to build and requires 3-5 years. Operating costs are 20-50% higher in the US and Europe vs. Taiwan/South Korea due to higher labor costs, lower government subsidies (historically), and underdeveloped local supply ecosystems (chemicals, gases, spare parts). The CHIPS Act incentives aim to close this cost gap. **Export Controls** US export controls restrict sale of advanced chip equipment and chips to China. ASML cannot sell EUV scanners to Chinese fabs. Tokyo Electron and Applied Materials face restrictions on certain equipment. China's response: massive investment in domestic equipment (SMEE lithography, AMEC etch, Naura PVD/CVD) and process development (SMIC 7nm using DUV multi-patterning). Semiconductor Supply Chain Geopolitics is **the strategic chessboard where technology sovereignty meets economic reality** — the realization that the most consequential technology in the modern world is manufactured through supply chains so concentrated and specialized that diversification requires national-scale investment over decade-long timescales.