Transistor Gate
The gate is the control terminal of a transistor — a thin conductive electrode sitting directly above the channel, separated from it by an ultra-thin insulating layer, whose voltage decides whether current can flow from source to drain at all. Everything else about a modern chip — billions of transistors switching billions of times per second — comes down to this one structure turning on and off correctly, repeatably, at vanishingly small size.
The gate works entirely through an electric field — it never conducts current into the channel itself. Apply enough positive voltage to an NMOS gate, and its electric field reaches down through the thin gate oxide and repels the majority carriers (holes) away from the silicon surface directly beneath it, pulling minority carriers (electrons) up to take their place. That thin layer of electrons forms an inversion channel — a temporary, field-induced conductive bridge connecting source to drain that exists only as long as the gate voltage holds it there. Drop the gate voltage back down, and the channel disappears, source and drain go back to being electrically isolated by the surrounding p-type substrate, and the transistor is off. This is the entire mechanism: no mechanical parts, no chemical reaction, just an electric field turning a thin layer of silicon into a conductor or an insulator on command.
Threshold voltage (V_T) is the specific gate voltage where this switch flips. Below V_T, the channel isn't fully formed and the transistor stays off (ignoring a small, unavoidable subthreshold leakage current that becomes a serious problem of its own at advanced nodes). Above V_T, the channel is strong enough to conduct, and the transistor is meaningfully on. Every digital logic gate in a chip — every AND, every NAND, every flip-flop — is ultimately built from transistors whose gates are being driven above or below this one threshold, over and over, billions of times per second.
Gate length is the single dimension the entire "node name" conversation used to be about. The physical distance between source and drain, directly beneath the gate, sets how short a path current has to travel once the channel forms — shorter gate length means faster switching, but also means the gate has a harder time maintaining control over the channel as source and drain get physically closer together. That loss of control shows up as leakage current that flows even when the transistor is supposed to be off, and it's the single biggest reason planar transistor gates eventually had to give way to FinFET and then gate-all-around architectures, each wrapping the gate around more of the channel's surface specifically to keep that control intact as gate length kept shrinking.
The gate material itself changed for exactly the same reason. Early transistors used a doped polysilicon gate sitting on a silicon dioxide gate oxide — simple, cheap, and adequate until gate oxides got thin enough (a few atomic layers) that electrons began quantum-mechanically tunneling straight through them, leaking current even with the gate nominally off. The industry's answer was the high-k metal gate: replacing silicon dioxide with a thicker-feeling but electrically-thinner high-dielectric-constant material (commonly hafnium oxide), paired with a metal gate electrode instead of polysilicon, restoring the gate's electrostatic control without needing an oxide thin enough to leak.
Modern gate architectures are best understood as successive answers to "how do we keep the gate in charge of the channel." A planar gate controls the channel from one side only. A FinFET wraps the gate around three sides of a vertical silicon fin, roughly tripling the gate's control surface for the same footprint. A gate-all-around (GAA) transistor goes further still, wrapping the gate completely around one or more horizontal silicon nanosheets, controlling the channel from all sides at once — the current state of the art for squeezing genuine on/off switching behavior out of a channel only a few nanometers wide.