tunneling current

**Tunneling Current** is the **flow of carriers through potential barriers that classical physics forbids them from surmounting** — a purely quantum mechanical phenomenon where the exponential tail of the carrier wavefunction extends into and through thin barriers, setting fundamental limits on gate oxide scaling and OFF-state leakage in MOSFETs. **What Is Tunneling Current?** - **Definition**: Electrical current resulting from quantum mechanical transmission of carriers through a potential barrier, occurring whenever barrier width falls below a few nanometers or barrier height is sufficiently low. - **Wavefunction Basis**: A carrier approaching a thin barrier has a nonzero wavefunction amplitude on the far side due to the exponential decay of the wavefunction inside classically forbidden regions. - **Transmission Probability**: Tunneling probability decreases exponentially with barrier thickness and the square root of the effective barrier height, making it extremely sensitive to small changes in oxide thickness. - **Multiple Mechanisms**: Tunneling in semiconductor devices occurs as direct tunneling through thin dielectrics, Fowler-Nordheim tunneling at high fields, band-to-band tunneling at high-doped junctions, and trap-assisted tunneling through defect-mediated pathways. **Why Tunneling Current Matters** - **Gate Oxide Scaling Limit**: Direct tunneling through the gate dielectric increases exponentially as SiO2 thickness decreases — below 1.2nm, gate leakage current density exceeds 1 A/cm2, making thinner SiO2 unusable for logic. - **High-K Dielectric Motivation**: High-k gate dielectrics such as HfO2 provide the same gate capacitance as a thinner SiO2 layer but with physically thicker barriers that suppress direct tunneling by orders of magnitude. - **OFF-State Leakage**: Band-to-band tunneling at the drain junction (GIDL) contributes to OFF-state leakage current, increasing static power consumption and degrading SRAM retention. - **Flash Memory Operation**: Fowler-Nordheim tunneling is the write and erase mechanism in Flash memory — controlled by gate voltage pulses that modulate the barrier shape to enable tunneling on command. - **Reliability Physics**: Trap-assisted tunneling through stress-created defects in the gate oxide is the primary degradation mechanism for SILC (stress-induced leakage current) and long-term oxide reliability. **How Tunneling Current Is Managed** - **Material Selection**: Replacing SiO2 with high-k dielectrics (HfO2, ZrO2, Al2O3) physically thickens the barrier without sacrificing capacitance, suppressing direct tunneling. - **Process Control**: Gate oxide thickness uniformity across the wafer must be controlled to better than 0.1nm because tunneling current varies by orders of magnitude over this range. - **TCAD Modeling**: Non-local band-to-band tunneling models and Fowler-Nordheim current density equations are standard in advanced TCAD decks for gate leakage and junction leakage prediction. Tunneling Current is **the quantum-mechanical wall that stopped SiO2 gate oxide scaling** — its exponential sensitivity to barrier thickness has driven one of the most consequential material transitions in semiconductor history, from SiO2 to high-k dielectrics, reshaping transistor design at every node below 65nm.