wafer bonding

**Wafer/Die Bonding** — physically and electrically connecting two wafers or dies together, enabling 3D integration and advanced packaging. **Types** - **Thermocompression Bonding**: Heat + pressure fuse metal bumps (Cu pillar, solder). Pitch: 40-100um - **Micro-bump Bonding**: Solder bumps at 20-40um pitch. Used for HBM stacking - **Hybrid Bonding (Direct Cu-Cu)**: Copper pads and oxide surfaces bond simultaneously at room temperature + anneal. Pitch: < 10um possible - **Oxide Bonding**: SiO2-SiO2 surface bonding (molecular forces). No metal connection — requires TSVs **Hybrid Bonding (The Future)** - No solder — direct copper-to-copper metallic bond - Sub-1um pitch demonstrated in research - Enables massive interconnect density between stacked dies - Already in production: Sony CMOS image sensors, AMD 3D V-Cache **Process** 1. CMP both surfaces to atomic smoothness 2. Plasma activate oxide surfaces 3. Align and contact at room temperature (oxide bonds) 4. Anneal at 200-300C (copper expands and bonds) **Applications** - 3D SRAM cache stacking (AMD 3D V-Cache: 64MB on top of CPU) - CMOS image sensors (backside-illuminated) - Future: Logic-on-logic stacking for chiplets **Hybrid bonding** is the key enabler for true 3D chip integration at densities impossible with traditional bumping.