wafer fabrication

**Silicon Wafer** — the thin crystalline substrate on which integrated circuits are built, manufactured through the Czochralski crystal growth process. **Manufacturing** 1. **Czochralski Process**: Dip seed crystal into molten silicon (1414C), slowly pull upward while rotating. Single crystal ingot grows — can be 300mm diameter, 2m long 2. **Slicing**: Diamond wire saws cut ingot into wafers (~775 um thick for 300mm) 3. **Lapping/Grinding**: Flatten to uniform thickness 4. **Polishing**: Chemical-mechanical polish (CMP) to atomic smoothness (< 0.5nm roughness) 5. **Cleaning**: Remove all particles and contaminants **Wafer Sizes** - 200mm (8 inch): Legacy nodes, analog, power devices - 300mm (12 inch): Standard for advanced logic and memory - 450mm: Abandoned — cost/benefit didn't justify transition **Key Specs** - Crystal orientation: (100) for CMOS, (111) for some MEMS - Resistivity controlled by initial doping - One 300mm wafer yields hundreds of dies - Wafer cost: $500-$2000; processed wafer value: $5000-$50,000+