Wfe

WFE — Wafer Fab Equipment spending — is the single number the entire chip industry uses to measure how much capital is being poured into new manufacturing capacity in a given year: the total dollar value of lithography scanners, etch and deposition chambers, ion implanters, and metrology tools purchased by every fab on Earth, as tracked quarterly by SEMI and reported on nearly every earnings call from Applied Materials, Lam Research, ASML, and KLA. It is the demand-side mirror of [foundry](foundry) and [chip](chip) supply: every new wafer-start of capacity a foundry adds shows up, a year or two earlier, as a line item in someone else's WFE purchase order.

$$\text{WFE} = \sum_{i} \big(\text{tool price}_i \times \text{tool count}_i\big) \quad\text{across litho, etch, deposition, implant, metrology, test}$$

The reason this single aggregate number matters more than any individual tool's price tag is that it is the direct input to the capital-intensity equation that decides whether a new fab is even worth building:

$$\text{Capex per wafer-start} = \frac{\text{Total WFE} + \text{facilities} + \text{startup}}{\text{Design wafer-starts-per-month}}$$

At a leading-edge logic node this figure has crossed $1 billion per thousand wafer-starts-per-month** of capacity — meaning a single modern 100,000-wafer-per-month fab represents on the order of $15–20 billion in committed capital before it ships a single working die, and the overwhelming majority of that capital is WFE line items, not the building around it.

WFE per Wafer-Start — Why Each Node Costs More to Enter capital required to build one thousand wafer-starts/month of capacity, by node generation node generation (older → newer) → WFE capex per 1,000 WSPM ($M) → 28nm 14nm 7nm 3nm 2nm / 18A EUV mandatory from here on each node adds EUV layers, more metrology steps, and tighter overlay tools — capex compounds, it doesn't just add

Three facts make WFE the practical measure of the toll bridge the entire [lithography](lithography) and [foundry](foundry) ecosystem sits on:

  • It is concentrated, not distributed. Roughly 80% of global WFE spend flows to five companies — ASML (lithography), Applied Materials (deposition/etch/CMP), Lam Research (etch/deposition), Tokyo Electron (coat/develop/etch), and KLA (metrology/inspection) — each the dominant or sole qualified supplier for its tool category at the leading edge. A foundry cannot simply shop around; there is often exactly one vendor whose tool is qualified for a given process step.
  • It leads the foundry capacity cycle by 12–24 months. A WFE purchase order placed today becomes installed, qualified capacity roughly a year or two later — which is why WFE bookings (reported quarterly) are the earliest public signal of where [foundry](foundry) wafer supply is actually headed, well before announced "fab opening" press releases.
  • It is the real moat behind foundry pricing power. The reason a customer cannot simply build their own fab to avoid foundry margin is that doing so means writing the same multi-billion-dollar WFE check the foundry already wrote — and doing it without the decades of process-integration know-how and tool-vendor relationships the incumbent foundry already has. The capital requirement is the moat; WFE is what makes that requirement a hard number instead of a vague claim.
$$\text{Marginal cost advantage of incumbent} \approx \text{WFE}_{\text{new entrant}} - \text{WFE}_{\text{incumbent, already depreciated}}$$

That last line is the entire Munger "toll bridge" argument for why advanced semiconductor manufacturing consolidates to two or three players worldwide rather than fragmenting like most industries: WFE is not a one-time cost an entrant can route around, it is the recurring, rising admission price for every new generation of [chip](chip), and whoever already paid the last round's price starts the next round with a structural cost advantage no amount of clever process engineering alone can close.

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