what is plasma etch

**Plasma etch is how a chip factory carves the pattern from a photomask into the actual silicon, layer by layer.** After lithography exposes a resist pattern on the wafer, that pattern is still just a stencil sitting on top of the film you actually want to shape — the plasma etch step is what removes everything *not* protected by that stencil, turning a 2D pattern into a real 3D structure: a trench, a gate, a via, a fin. It's one of the two workhorses of the repeated deposit-pattern-etch loop that builds a modern chip's 60–100+ layers. **The "plasma" part is what makes this different from simply dissolving material in a chemical bath.** Inside a vacuum chamber, radio-frequency power rips process gases (fluorocarbons like CF4/C4F8, or chlorine-based gases like Cl2/HBr) into a soup of reactive radicals and charged ions. A voltage bias then pulls those ions straight down onto the wafer at high speed. This combination — chemical radicals that react with the exposed film, plus a stream of ions slamming straight down — is what lets plasma etch do something a wet chemical bath never could: etch *anisotropically*, meaning almost entirely in one direction (down) instead of eating sideways under the mask. ```svg Plasma Etch: From Masked Resist to a Vertical Trench A cross-section showing ions and radicals bombarding a masked wafer, carving a trench with controlled sidewall angle and minimal undercut. PLASMA ETCH: MASK -> TRENCH, ONE LAYER AT A TIME VACUUM CHAMBER — REACTIVE PLASMA ↓ ions ↓ ions ↓ ions ↓ ions radicals ~ ~ radicals MASK MASK MASK trench: near-90° sidewall minimal undercut Underlying film / etch-stop layer WHAT PROCESS ENGINEERS ARE TUNING Selectivity — how much faster the target film etches vs. the mask/etch-stop Anisotropy — vertical etch rate vs. lateral (sideways) etch rate Uniformity — same etch depth across the entire 300 mm wafer, edge to center Endpoint — the exact moment to stop, detected optically, not by a timer Get any one of these wrong and the transistor or via below is out of spec. ``` **Not every etch step wants the same trade-off, which is why fabs use several different flavors of the process.** A pure chemical (wet) etch is cheap and gentle but etches in every direction equally, undercutting the mask — fine for simple cleanup steps, useless for a nanometer-scale transistor fin. A purely physical process (ion milling) is highly directional but has almost no selectivity, chewing through the mask nearly as fast as the target film. Real production etch recipes sit between these extremes, tuning gas chemistry and ion energy to hit a specific sidewall angle and selectivity target for that exact layer. | Etch Type | Direction | Typical Selectivity | Best For | Weak Point | |---|---|---|---|---| | Wet chemical etch | Isotropic (all directions) | Very high | Blanket strip, cleanup, sacrificial release | Undercuts mask, no fine features | | Remote plasma (radicals only, no ion bias) | Isotropic | High | Gentle strip, damage-sensitive films | No directionality | | Reactive Ion Etch (RIE) | Anisotropic | Moderate | Gate, fin, and via patterning | Selectivity vs. mask can be tight | | High-density plasma (ICP) | Strongly anisotropic | Tunable (independent bias) | Advanced-node logic, high-aspect-ratio features | More complex tool, more knobs to control | **Endpoint detection is what keeps the process from simply guessing when to stop.** As the etch clears through the target film and starts exposing the layer underneath, the plasma's own light signature changes — specific byproduct wavelengths spike or collapse. An optical emission spectrometer watches that signal in real time and cuts the etch the instant it sees the transition, rather than relying on a fixed timer that would either stop early (leaving residue) or run long (damaging what's underneath). ```flowchart st=>start: Load masked wafer into vacuum etch chamber strike=>operation: Feed process gas (CF4, Cl2, HBr, etc.); strike RF plasma into radicals + ions bombard=>operation: Bias voltage accelerates ions straight down onto exposed film react=>operation: Reactive radicals chemically attack film; ions clear byproducts and drive direction watch=>operation: Optical emission spectrometer tracks byproduct light signature in real time detect=>operation: Signal shift detected -> target film has cleared to the layer below stop=>end: Etch halted at endpoint; wafer moves to resist strip and inspection st->strike->bombard->react->watch->detect->stop ``` **None of this is academic for AI chip hardware — it's the step that decides whether a transistor or interconnect actually works.** A modern AI accelerator relies on the plasma etch step dozens of separate times per chip: cutting gate structures for GAA nanosheet transistors, opening high-aspect-ratio vias for HBM stacking, and patterning the copper interconnects that move data between compute tiles. A sidewall a few degrees off vertical, or an endpoint caught a second too late, can be the difference between a working die and a scrapped one — which is exactly why fabs treat etch selectivity, uniformity, and endpoint accuracy as production-critical, not just a lab curiosity.

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