yield modeling

Yield is the fraction of manufactured units that work — most commonly die yield, the share of dies on a wafer that pass test. It is the number that turns a process into a business: with hundreds of process steps where a single defect can kill a die, yield sets cost-per-good-die and gates whether a design is manufacturable at all.\n\n**A wafer holds many dies; a defect anywhere in a die usually kills it.** Random particle and pattern defects land across the wafer at some average density D0 (defects per unit area). The larger a die, the more likely it catches at least one defect — so good dies cluster where defects happen to miss, and yield is simply good dies over total dies. Edge dies that fall off the round wafer are lost too, which is a second, geometric yield term separate from defects.\n\n**Yield falls exponentially with die area — this is the whole argument for chiplets.** Under the simplest Poisson model, yield Y = e^(-A·D0): double the area A and yield drops sharply. Real defects cluster rather than scatter uniformly, so fabs use the Murphy or negative-binomial models, which are more forgiving than Poisson but keep the same shape. Either way, one big monolithic die yields far worse than several small ones doing the same work — so splitting a design into chiplets recovers yield and is often the difference between viable and not.\n\n| Term | Meaning | Why it matters |\n|---|---|---|\n| Die yield | good dies / total dies | drives cost-per-good-die |\n| D0 | defect density (defects/cm2) | lower = more good dies |\n| Critical area | area where a defect is fatal | links layout to yield |\n| Poisson Y=e^(-A·D0) | uniform-defect model | quick estimate |\n| Murphy / neg-binomial | clustered-defect models | fab-accurate |\n\n```svg\n\n```\n\n**Yield is learned, not given.** A new node starts at low yield and climbs a learning curve as engineers find and kill systematic defect sources; an excursion (a sudden tool or material problem) can crash it overnight. Fabs push yield up with defect-density reduction, design-for-manufacturing rules that shrink critical area, and redundancy plus repair (spare rows in memory, spare cores) so a defective unit can be salvaged rather than scrapped.\n\nRead yield through a quant lens rather than a pass/fail lens: it is a probability that compounds over area and steps, and it flows straight into cost-per-good-transistor. Because Y = e^(-A·D0), the leverage is either lowering D0 or shrinking the die — which is exactly why chiplets, redundancy, and defect-density programs exist. Treat yield as a measured exponential to be engineered, not a fixed property of the process.