Home Knowledge Base AMBA / AXI Bus

AMBA / AXI Bus — ARM's standardized on-chip interconnect protocol family that defines how IP blocks (CPUs, GPUs, DMAs, peripherals) communicate inside an SoC.

AMBA Protocol Family

AXI Key Features

Typical SoC Interconnect

<svg viewBox="0 0 578 112" xmlns="http://www.w3.org/2000/svg" style="max-width:100%;height:auto" role="img"><rect x="0" y="0" width="578" height="112" rx="12" fill="#0d1117"/><g font-family="ui-monospace,SFMono-Regular,Menlo,Consolas,&quot;Liberation Mono&quot;,monospace" font-size="14"><text xml:space="preserve" x="20" y="31.7"><tspan fill="#c9d1d9">CPU </tspan><tspan fill="#6e7681">──┐</tspan></text><text xml:space="preserve" x="20" y="50.7"><tspan fill="#c9d1d9">GPU </tspan><tspan fill="#6e7681">──┼──</tspan><tspan fill="#c9d1d9"> [AXI Interconnect/NoC] </tspan><tspan fill="#6e7681">──┬──</tspan><tspan fill="#c9d1d9"> DDR Controller</tspan></text><text xml:space="preserve" x="20" y="69.7"><tspan fill="#c9d1d9">DMA </tspan><tspan fill="#6e7681">──┘</tspan><tspan fill="#c9d1d9">                             </tspan><tspan fill="#6e7681">├──</tspan><tspan fill="#c9d1d9"> On-chip SRAM</tspan></text><text xml:space="preserve" x="20" y="88.7"><tspan fill="#c9d1d9">                                    </tspan><tspan fill="#6e7681">└──</tspan><tspan fill="#c9d1d9"> APB Bridge </tspan><tspan fill="#6e7681">→</tspan><tspan fill="#c9d1d9"> Peripherals</tspan></text></g></svg>

AMBA is the de-facto standard — virtually every ARM-based SoC (smartphones, IoT, automotive) uses AMBA protocols. Even non-ARM designs often adopt AXI for IP compatibility.

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