Aspect Ratio Dependent Etching (ARDE) and Etch Selectivity are the fundamental plasma etch phenomena where etch rate and profile depend on feature geometry — ARDE causes deep narrow features to etch slower than shallow wide features due to reduced transport of etchant species and products in high-aspect-ratio structures, while etch selectivity governs how much faster one material is removed versus another, both being critical process knobs for precision semiconductor patterning at advanced nodes.
Aspect Ratio Dependent Etching (ARDE)
- Also called "RIE lag" or "microloading".
- Narrow trenches (high AR) etch slower than wide trenches (low AR) under the same etch conditions.
- Root causes:
- Ion shadow: Ions travel at angle → blocked by trench sidewalls at high AR → fewer ions reach bottom.
- Neutral depletion: Reactive radicals consumed along sidewalls before reaching bottom → less neutral flux.
- Product redeposition: Etch byproducts redeposit on sidewalls → partial blocking → reduced rate.
ARDE in Quantitative Terms
- Define lag = (ERwide - ERnarrow) / ERwide × 100%.
- Typical ARDE lag: 10–30% at AR = 10:1 for SiO₂ RIE.
- HARC (High Aspect Ratio Contact) at 50:1+: Even more severe lag; multiple etch steps and chemistry changes required.
- 3D NAND wordline slit etch: AR 50–100:1 → etch time 2–3× longer per depth unit vs calibration.
Compensating for ARDE
- Pulsed plasma: Pulsed power allows neutrals to replenish between pulses → less depletion.
- Pressure reduction: Lower pressure → longer mean free path → ions travel straighter → less shadowing.
- Temperature: Wafer temperature affects surface reaction rate → optimize for ARDE compensation.
- Etch chemistry: Atomic layer etch (ALE) is nearly ARDE-free → ideal for high-AR features.
- Feature-size-aware recipe: Multiple-step etch → early phase optimized for wide features, later for narrow.
Etch Selectivity
- Selectivity S = ER_material1 / ER_material2.
- High selectivity needed at etch stop → etch through layer A without removing layer B.
- Example: SiO₂:Si selectivity for HF wet etch = 100:1 → excellent etch stop on Si.
- Fluorine chemistry (SF₆/CF₄): High selectivity Si vs SiO₂ in some regimes; reversed in others.
Selectivity Mechanisms
| Mechanism | Example | Selectivity Source |
|-----------|---------|-------------------|
| Chemical | F etches Si fast, SiN slow | Bond strength (Si-N > Si-Si) |
| Physical (ion) | SiO₂ vs photoresist | Ion damage threshold difference |
| Passivation | Si vs SiO₂ in Cl₂ | Oxide forms native passivation |
| Thermal | Thermal SiO₂ vs PECVD oxide | Density difference → different etch rate |
Loading Effect (Macroloading)
- Global loading: Large exposed area on wafer consumes more etchant → less available for small features.
- More silicon area → more F consumed by Si → less F for SiO₂ → SiO₂ etch rate increases.
- Macroloading correction: Adjust etch time or power based on open area fraction.
- Microloading: Same effect within single die → dense feature array etches differently than isolated.
Profile Control: Sidewall Passivation
- Anisotropic etching requires passivation layer on sidewalls → prevents lateral etch.
- Fluorocarbon chemistry (C₄F₈): Deposits polymer on sidewalls → protects them from ions (vertical) → ions etch bottom → anisotropic profile.
- Balance: Too much polymer → clogged; too little → bowing/notching.
- Low-frequency bias power controls ion energy → deeper profile control.
ARDE and etch selectivity are the physical constraints that define the achievable geometric precision in semiconductor manufacturing — as feature aspect ratios increase from 5:1 to 50:1+ in 3D NAND and advanced contact holes, ARDE-induced non-uniformity becomes the primary challenge requiring multi-step chemistry transitions and careful plasma modeling, while selectivity engineering determines whether a 2nm thin etch stop layer can reliably halt an etch through 200nm of material above it, making these phenomena central to every advanced node process module.