Backside grinding (wafer thinning) reduces wafer thickness from the standard 775μm (300mm wafer) to 50-200μm by mechanically grinding the wafer backside after front-side device fabrication is complete. It's essential for advanced packaging.

Why Thin Wafers?

3D stacking: Thinner dies enable taller stacks within package height limits (e.g., HBM memory stacks 8-12 dies). TSV reveal: Through-silicon vias must be exposed from the backside—grinding removes excess silicon to reveal TSV tips. Thermal performance: Thinner silicon reduces thermal resistance, improving heat dissipation from active devices. Package height: Mobile devices require ultra-thin packages (total < 1mm).

Process Steps

Step 1 - Tape/Carrier Mount: Protect front-side devices with UV tape or temporary bonding to a glass/silicon carrier. Step 2 - Coarse Grind: Diamond wheel removes bulk silicon quickly (removal rate ~5μm/s). Grind to within 10-20μm of target. Step 3 - Fine Grind: Finer diamond wheel polishes to final thickness (removal rate ~0.5μm/s). Reduces subsurface damage. Step 4 - Stress Relief: CMP, dry polish, or wet etch removes grinding-induced damage layer (5-10μm) that would weaken the die. Step 5 - Demount: Remove carrier/tape.

Challenges

Wafer warpage: Thin wafers warp from film stress. Carrier systems keep wafers flat during subsequent processing. Breakage: Yield loss from mechanical handling of thin wafers. Automated handling is essential. TTV (Total Thickness Variation): Target < 2μm across the wafer for uniform TSV reveal.