A barrier layer is a thin film deposited between adjacent layers to prevent atomic diffusion that would degrade device performance or reliability. Primary application: Copper barrier - prevents Cu from diffusing into silicon and dielectric where it causes junction leakage, dielectric degradation, and device failure. Materials: TaN/Ta bilayer (most common Cu barrier), TiN/Ti (older, also used for W contacts), Co, Ru (emerging for scaled nodes). Thickness: 1-5nm at advanced nodes. Must be as thin as possible to maximize conductor volume. Requirements: Must be continuous and pinhole-free. Must adhere well to dielectric and to conductor. Must resist diffusion at operating temperatures. Deposition: PVD (sputtering, IPVD), CVD, or ALD. ALD increasingly used for thinnest, most conformal barriers. Conformality challenge: PVD barriers thin on sidewalls and bottoms of high-AR features. IPVD and ALD address this. Resistance impact: Barrier occupies space that could be conductor, increasing effective line resistance. Major concern at scaled nodes. TaN/Ta: TaN provides amorphous diffusion barrier. Ta promotes copper adhesion and proper grain orientation. Integration: Barrier is first layer deposited after trench/via etch and clean. Surface preparation critical for adhesion.