Buried Power Rails (BPR) are power distribution lines embedded in the front-side silicon substrate below the transistors — moving VDD and VSS rails from the BEOL metal layers into the chip substrate, freeing up BEOL routing resources and reducing standard cell height.

BPR Integration

• Trench Formation: Etch deep trenches into the silicon substrate between active device regions.
• Isolation: Line the trench with dielectric to isolate the power rail from the substrate.
• Metal Fill: Fill the trench with a low-resistance metal (W, Ru, or Cu).
• Connection: Connect BPR to transistor S/D through local interconnects and to BEOL through via connections.

Why It Matters

• Cell Area: BPR eliminates power rails from M1, enabling ~15-20% standard cell area reduction.
• IR Drop: Wider buried rails can reduce power delivery resistance and IR drop.
• Backside PDN: BPR enables backside power delivery networks (BSPDN) — the future of power distribution.

BPR is burying the power lines underground — embedding power rails in the substrate to free up wiring resources above the transistors.