Carbon Nanotube Transistors (CNT FETs) are transistors built using semiconducting carbon nanotubes as the channel material instead of silicon — offering theoretical 5-10x energy efficiency improvements and THz-class switching speeds that could extend Moore's Law beyond the physical limits of silicon.

Why Carbon Nanotubes?

• Carrier Mobility: CNTs exhibit ballistic transport — electrons travel without scattering. Mobility > 10,000 cm²/V·s (Si: ~500 cm²/V·s).
• Diameter: 1–2 nm natural channel width — smaller than any lithographically patterned silicon fin.
• Band Gap: Tunable by diameter — 0.5–1.0 eV range suitable for logic.
• Thermal Conductivity: ~3500 W/m·K along tube axis (Cu: 400 W/m·K).

CNT FET Architecture

• Channel: Aligned array of parallel semiconducting CNTs bridging source and drain.
• Gate: Wraps around CNTs (gate-all-around geometry naturally).
• Contacts: End-bonded or side-bonded metal contacts (Pd for p-type, Sc for n-type).

Key Challenges

• Purity: As-grown CNTs are ~2/3 semiconducting, 1/3 metallic. Metallic tubes short-circuit the transistor.
• DREAM process (MIT, 2019): Achieved 99.99% semiconducting purity through selective polymer wrapping.
• Alignment: CNTs must be parallel and evenly spaced for uniform current.
• Density: Need > 100–200 CNTs per micrometer for competitive drive current.
• Variability: Diameter variation → threshold voltage variation.

Milestones

• 2019: MIT demonstrated 16-bit RV16X-NANO RISC-V processor using CNT FETs — first commercial-complexity CNT chip.
• 2020: Beijing University demonstrated sub-10 nm CNT FETs outperforming scaled Si FinFETs.
• 2024: SkyWater/MIT partnership exploring CNT integration on 200mm CMOS fab line.

CNT vs. Silicon Comparison

Carbon nanotube transistors represent one of the most promising beyond-silicon channel materials — if the purity, alignment, and density challenges are solved at manufacturing scale, CNT FETs could deliver transformative energy efficiency gains for data centers and mobile computing.