Charged Device Model (CDM) is the ESD test model that simulates the most common real-world ESD event in manufacturing — where the IC package itself accumulates charge (from sliding, handling, pick-and-place) and then rapidly discharges when a pin contacts a grounded surface.
What Is CDM?
- Mechanism: The entire package is charged. When any pin touches ground, the stored charge exits through that pin in < 1 ns.
- Waveform: Extremely fast. Rise time ~100-250 ps. Duration ~1-2 ns. Peak current 5-15 A (much higher than HBM).
- Classification: C1 (125V), C2 (250V), C3 (500V), C4 (750V), C5 (1000V).
- Standard: ANSI/ESDA/JEDEC JS-002.
Why It Matters
- Most Common Failure Mode: CDM events are the #1 cause of ESD damage in automated assembly lines.
- Internal Damage: The fast discharge can destroy thin gate oxides internally without visible external damage.
- Design Challenge: Protecting against CDM requires careful power clamp and core clamp design.
CDM is the self-inflicted lightning strike — modeling the moment a charged chip grounds itself and sends a destructive current surge through its most sensitive internal structures.
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