Chemical Oxide Removal (COR/SiCoNi) is the low-damage dry cleaning and oxide removal process that uses gas-phase reactants (typically NH₃ + NF₃ or HF vapor) to selectively remove thin oxide layers from silicon surfaces at low temperature — replacing traditional wet HF cleans in advanced CMOS manufacturing where wet processing risks pattern collapse, poor uniformity on high-aspect-ratio features, and queue-time sensitivity, enabling damage-free surface preparation before epitaxy, contact formation, and gate stack deposition.
Why Dry Oxide Removal
- Wet HF: Isotropic, excellent selectivity, but causes capillary-driven pattern collapse at < 20nm pitch.
- Wet HF: Requires wafer transfer from wet bench to deposition tool → queue time → native oxide regrows.
- COR/SiCoNi: Performed in-situ or in cluster tool → no air exposure → pristine surface.
- Advanced nodes: Sub-1nm oxide control required → COR provides angstrom-level precision.
SiCoNi Process Flow
1. Reactant exposure: NH₃ + NF₃ dissociated by remote plasma → NH₄F and NH₄F·HF radicals. 2. Surface reaction: Radicals react with SiO₂ → form (NH₄)₂SiF₆ solid salt on surface. 3. Sublimation: Heat wafer to 100-200°C → salt sublimates → clean Si surface exposed. 4. Result: Self-limiting oxide removal (~1-3nm per cycle) with no plasma damage to Si.
SiO₂ + NH₄F·HF → (NH₄)₂SiF₆ (solid) + H₂O
↓ Heat (100-200°C)
(NH₄)₂SiF₆ → gaseous byproducts
Clean Si surface remains
Process Characteristics
| Parameter | SiCoNi | Wet HF | Plasma Etch |
|---|---|---|---|
| Oxide removal rate | 1-3 nm/cycle (self-limiting) | Continuous | Continuous |
| Si damage | None | None | Ion bombardment |
| Selectivity (SiO₂:Si) | >100:1 | ~100:1 | 5-20:1 |
| Pattern collapse risk | None (dry) | High at <20nm pitch | None |
| Uniformity | ±0.5% | ±2-5% | ±1-2% |
| Queue time sensitivity | None (in-situ) | Critical (< 2hr) | Low |
Applications in CMOS
| Application | Why COR/SiCoNi | Requirement |
|---|---|---|
| Pre-epitaxy clean | Remove native oxide before SEG | Sub-nm oxide removal, no Si damage |
| Pre-contact clean | Clean via bottom before metal fill | High AR compatible |
| Pre-gate dielectric | Pristine Si before HfO₂ ALD | Angstrom-level control |
| STI recess etch | Remove oxide with precise depth control | Self-limiting cycles |
| Spacer pull-back | Thin oxide spacer without CD loss | Isotropic, sub-nm control |
Self-Limiting Nature
- Each COR cycle removes fixed oxide thickness regardless of exposure time.
- Once reacted salt covers surface → blocks further reaction → self-limiting.
- Thickness control: Repeat cycles → precisely remove 2nm, 4nm, 6nm, etc.
- This is conceptually similar to ALE (Atomic Layer Etch) but for oxide specifically.
Integration in Cluster Tool
[COR/SiCoNi Chamber] → [Anneal Chamber] → [Epi/CVD Chamber]
Remove oxide Sublimate salt Deposit film
(no vacuum break between steps → no native oxide regrowth)
- Cluster integration eliminates the queue-time problem entirely.
- Enables sequential process: clean → grow epitaxy in same tool → best interface quality.
Chemical oxide removal is the precision surface preparation technology that makes sub-5nm CMOS manufacturing possible — by providing self-limiting, damage-free, in-situ oxide removal with angstrom-level control, COR/SiCoNi processes have replaced wet HF cleaning at critical process steps where pattern integrity, surface quality, and queue-time control are non-negotiable requirements for achieving defect-free interfaces.
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