Controlled Experiment (DOE — Design of Experiments) is the structured statistical methodology for systematically varying multiple input parameters (factors) while measuring output responses, using mathematically optimized experimental layouts that extract maximum information about main effects, interaction effects, and optimal operating conditions from the minimum number of experimental runs — the fundamental engineering tool that transforms semiconductor process development from trial-and-error recipe tweaking into rigorous, data-driven optimization.

What Is DOE?

• Definition: DOE is a branch of applied statistics that prescribes how to set up experiments so that the results can be analyzed with maximum statistical efficiency. Instead of changing one variable at a time (OFAT), DOE changes multiple factors simultaneously in a structured pattern, allowing the detection of interaction effects that OFAT experiments completely miss.
• Factors and Levels: Factors are the input variables being studied (temperature, pressure, gas flow, RF power). Levels are the specific values each factor takes in the experiment (e.g., temperature at 400°C and 450°C). A 2-factor, 2-level experiment (2²) requires 4 runs. A 5-factor, 2-level experiment (2⁵) requires 32 runs — but fractional factorial designs can reduce this to 8 or 16 runs while still capturing main effects and key interactions.
• Response Variables: The output metrics being optimized — etch rate, uniformity, defect density, selectivity, throughput, or any measurable quality characteristic.

Why DOE Matters

• Interaction Detection: The most valuable insight from DOE is interaction effects — situations where the effect of Factor A depends on the level of Factor B. In semiconductor processing, interactions are ubiquitous: the effect of etch pressure on CD depends on the RF power setting. OFAT experiments cannot detect these interactions because they hold all other variables constant.
• Process Window Mapping: DOE enables construction of response surface models that map the entire process space — showing where the output is on target, where it becomes sensitive to variation, and where the robust operating region (process window) is widest. This directly informs process centering and specification setting.
• Efficiency: A semiconductor process may have 20+ adjustable parameters. Testing all combinations at 2 levels would require 2²⁰ = 1,048,576 runs — physically impossible. DOE fractional factorial and response surface designs extract the critical information from 30–50 runs by exploiting the mathematical structure of factorial designs.
• Optimization: DOE response surface methodology (RSM) uses central composite or Box-Behnken designs to fit quadratic models that identify the true optimum — not just the best point tested, but the mathematical optimum of the fitted response surface, including saddle points and ridges that simple screening would miss.

DOE Types in Semiconductor Manufacturing

Controlled Experiment is systematic discovery — replacing intuition and one-at-a-time guessing with mathematically rigorous experimental design that maps the process landscape efficiently to find the sweet spot where yield, uniformity, and reliability all converge.