Copper Annealing is the controlled thermal treatment of electroplated copper interconnects to promote grain growth and recrystallization — transforming the as-deposited fine-grained microstructure into large-grained copper with lower electrical resistivity, improved electromigration resistance, and more uniform CMP removal, directly impacting interconnect performance and reliability at every technology node.

Why Copper Needs Annealing

• As-deposited electroplated Cu: Fine grains (20-50 nm diameter), high grain boundary scattering.
• Resistivity of as-deposited Cu: ~2.5-3.0 μΩ·cm (vs. bulk Cu: 1.67 μΩ·cm).
• After annealing: Grains grow to 0.5-2 μm → resistivity drops 10-20%.
• Large grains have fewer grain boundaries → better EM resistance (atoms pile up at boundaries).

Self-Annealing Phenomenon

• Electroplated Cu undergoes spontaneous recrystallization at room temperature over hours to days.
• Driven by: High internal stress from the plating process provides energy for grain growth.
• Self-annealing is variable and uncontrolled → fabs use deliberate thermal anneal for consistency.

Anneal Process

• Standard recipe: 200-350°C for 1-5 minutes in forming gas.
• Must anneal BEFORE CMP: Non-uniform grain structure causes dishing and erosion variation during polish.

Grain Size and Resistivity

• Resistivity contribution from grain boundaries: $\Delta\rho_{GB} \propto \frac{1}{d}$ (d = grain diameter).
• At advanced nodes (Cu line width < 30 nm): Wire width < grain size → grains span the entire wire cross-section (bamboo structure).
• Bamboo structure: Actually beneficial for EM — atoms cannot diffuse along grain boundaries down the wire length.

Impact on CMP

• Non-annealed Cu: Mix of small and large grains → different polish rates → surface roughness.
• Properly annealed Cu: Uniform large grains → smooth, predictable CMP.
• Without anneal before CMP: 10-30% increase in dishing and erosion defects.

Impact on Electromigration

• Large grains: Fewer grain boundaries for atomic diffusion → 2-5x improvement in EM lifetime.
• Combined with proper barrier (TaN/Ta): Cu interconnects meet 10-year reliability targets at elevated temperatures.

Copper annealing is a critical but often overlooked step in the BEOL process — this simple thermal treatment fundamentally transforms the electrical and mechanical properties of the interconnect metal, ensuring that the billions of copper wires in a modern chip perform reliably throughout the product lifetime.