Doping is how a piece of silicon is turned into a device. Pure, intrinsic silicon is a mediocre conductor with very few free carriers, and on its own it can do nothing useful. By deliberately introducing a tiny, controlled amount of impurity atoms, a fab dials the material's conductivity across many orders of magnitude and chooses whether current is carried by electrons or by holes. Every transistor, diode, and resistor on a chip is ultimately a pattern of differently doped regions, so doping is the step that writes electrical function into otherwise inert crystal.\n\nThe dopant's column in the periodic table decides the carrier type. Silicon sits in group IV with four bonding electrons. Add a group-V atom such as phosphorus, arsenic, or antimony and it brings a fifth electron that is loosely bound and easily freed, donating a mobile negative carrier and making the region n-type. Add a group-III atom such as boron and it is one electron short of completing the bonds, leaving a hole that behaves as a mobile positive carrier and making the region p-type. Donors give electrons, acceptors accept them, and the choice between the two is simply which impurity you introduce.\n\nConcentration is the second knob, and it sets everything quantitative. The number of dopant atoms per cubic centimeter fixes the carrier density, which in turn fixes resistivity, depletion widths, threshold voltages, and how a junction behaves under bias. Doping levels span an enormous range, from lightly doped channels and wells up to heavily doped source, drain, and contact regions that are made as conductive as possible. Because the whole device depends on it, the dopant profile, concentration versus depth, is measured carefully by techniques such as SIMS, while sheet resistance probes confirm how much of the dopant is electrically active.\n\nThere are two ways to get the dopants in, and they draw different profiles. Thermal diffusion, the older method, exposes the hot wafer to a dopant source and lets atoms diffuse in from the surface, producing a smooth, monotonically decreasing profile set by temperature and time. Ion implantation, the modern workhorse, fires dopant ions in at chosen energy and dose, placing a controllable amount at a controllable depth as a buried peak, at the cost of crystal damage that must be repaired. Implant gives precision and independent control of dose and depth; diffusion gives simplicity and deep, graded profiles.\n\nA junction is simply where one type meets the other, and shallow is hard. Where an n-type region abuts a p-type region you get the p-n junction that is the heart of diodes and the terminals of transistors. As devices shrink, source and drain junctions must be made extremely shallow and abrupt, which fights against the diffusion that any heat causes, so doping is inseparable from the rapid, low-thermal-budget anneals used to activate implants without letting them spread. In FinFET and gate-all-around devices, where the channel is a three-dimensional fin or nanosheet, doping even has to wrap conformally around the structure, driving techniques like plasma and monolayer doping.\n\n| Property | n-type | p-type |\n|---|---|---|\n| Dopant group | Group V (P, As, Sb) | Group III (B) |\n| Role | Donor: adds an electron | Acceptor: adds a hole |\n| Majority carrier | Electrons (negative) | Holes (positive) |\n| Example use | Source/drain of NMOS, wells | Source/drain of PMOS, wells |\n| Introduced by | Ion implantation or diffusion | Ion implantation or diffusion |\n\n``svg\n\n``\n\nRead doping through a carrier-type-and-concentration lens rather than a just-add-impurities lens. Once you see that the dopant's periodic-table column decides whether electrons or holes carry the current, and that the atoms-per-cubic-centimeter sets every electrical parameter downstream, the rest of front-end processing falls into place: implant and diffusion are just two ways to draw the profile you want, and the anneal that follows exists to switch those dopants on before they have a chance to wander.