Electromigration is current-driven atomic transport in a metal interconnect. In copper back-end-of-line wiring, damage develops when the atomic flux is not spatially continuous: atoms leave a vulnerable region faster than they arrive, nucleating a void, or accumulate where transport is blocked, raising compressive stress and sometimes producing an extrusion. Copper displaced aluminum partly because its lower resistivity and generally better electromigration performance offered valuable reliability headroom, but the usable margin belongs to the entire patterned stack—not to bulk copper alone. Line and via geometry, current crowding, temperature, microstructure, liner and cap interfaces, and mechanical stress determine whether a particular interconnect survives its specified mission profile.

Black's equation is a compact empirical acceleration model, not a universal law that can be transferred unchanged between interconnect stacks or failure modes. A common form is

where $J$ is current density, $T$ is absolute temperature, $E_a$ is an apparent activation energy, $n$ is the fitted current exponent, and $A$ contains geometry, materials, and statistical factors. Values such as $n\approx1$ or $2$ and activation energies around the interface-diffusion regime are often reported, but choosing them by convention can hide a mechanism change. Qualification therefore stresses representative structures at multiple currents and temperatures, checks that the same failure site and mechanism persist, fits a lifetime distribution as well as its median, and limits extrapolation to the validated regime. Joule self-heating must be separated from the programmed chuck temperature because the exponential term responds to the actual conductor temperature.

The electron wind supplies the electrical driving force, while diffusivity and counteracting chemical or mechanical-potential gradients determine the resulting atomic flux. In a one-dimensional description, a useful schematic form is

where $J_a$ is atomic flux, $D$ is the effective diffusivity along the active path, $C$ is mobile-atom concentration, $\mu$ is chemical potential including stress, $Z^*$ is effective charge, $\rho$ is resistivity, and $j$ is signed current density. Sign conventions vary, but copper atoms generally drift with electron flow. Damage is governed by $-\partial J_a/\partial x$, not by a large uniform flux alone: current crowding, temperature gradients, changes in diffusion path, via interfaces, and blocking boundaries create the divergence that supplies or removes atoms locally. Cathode-side voiding is common in passivated Cu structures; anode accumulation raises compressive stress and can contribute to extrusion if confinement fails.

Microstructure matters because grain boundaries, interfaces, and the bulk lattice offer different diffusion kinetics, but the fastest path is process- and geometry-specific. Large grains and bamboo-like structures can reduce continuous grain-boundary transport, while small grains, seams, and texture variations can introduce fast paths and broaden the failure-time distribution. In many damascene Cu stacks the top Cu/dielectric-cap interface dominates; in others the liner interface or grain boundaries contribute materially. Post-plating anneal and additive chemistry are therefore qualified through measured texture, grain distribution, resistance, and electromigration statistics rather than through a universal instruction to maximize one grain orientation.

The barrier and capping layers surrounding a copper line are not electromigration-neutral packaging — they actively participate in setting the atomic flux boundary conditions at every interface, and interface quality at the copper-barrier and copper-cap boundaries is frequently the actual electromigration-limiting factor rather than bulk copper diffusion. A well-bonded, contamination-free copper-to-cap interface (commonly a dielectric barrier such as SiN or SiCN, or a metal cap such as cobalt) suppresses fast surface diffusion along that interface, which is often the dominant electromigration pathway in modern damascene copper interconnects rather than diffusion through the bulk grain interior or even along grain boundaries. Because interface diffusion frequently dominates, electromigration lifetime improvement efforts at advanced nodes have focused heavily on cap-layer adhesion chemistry and barrier-copper interface cleanliness, sometimes yielding larger lifetime gains than changes to the bulk copper microstructure alone.

Back stress can arrest transport in a sufficiently short, well-confined segment, which is why line length belongs beside current density in an electromigration assessment. Atom depletion produces tensile stress near one end while accumulation produces compression near the other; the resulting stress-gradient-driven flux opposes the electron wind. In the idealized Blech criterion, a segment is below its critical product when

with segment length $L$, atomic volume $\Omega$, and allowable stress difference $\Delta\sigma_{\mathrm{crit}}$. Real multibranch interconnect networks, vias, reservoirs, temperature gradients, and weak interfaces require stress-evolution analysis rather than blind application of this scalar threshold, but the principle is fundamental: a short segment can sustain a current density that would damage a longer segment because it builds balancing back stress before a critical void forms.

Design the interconnect stack: line width, barrier/liner composition, cap layer material and process → Fabricate test structures representative of the production metal level and via configuration → Stress test at accelerated current density and temperature per the qualification plan → Monitor resistance continuously during stress to detect the onset of voiding or extrusion → Extract time-to-failure distribution and fit Black's equation parameters (A, n, activation energy) for this stack → Extrapolate to use-condition current density and temperature to project field lifetime → Compare projected lifetime against the product reliability target with appropriate margin → Identify the dominant failure mode (cathode void, anode extrusion, via-bottom) from failure-site analysis → Feed grain-texture, interface-cleanliness, or via-redundancy design changes back into the stack if margin is insufficient → Requalify whenever barrier chemistry, cap material, anneal recipe, or design rules change materially

Electromigration design rules translate qualified physics into limits on wires, vias, and mission profiles rather than one universal maximum-current number. Power grids need temperature-aware current limits, current-crowding treatment, and redundant via arrays; bidirectional and pulsed signals require foundry-qualified effective-current models that distinguish net directional transport, duty cycle, and thermal cycling. Peak current still matters for local heating and crowding, while time-averaged or directional current may govern accumulated atomic transport, so replacing the waveform with either peak or average alone can be wrong. Signoff must use the foundry rule appropriate to the layer, geometry, temperature, waveform class, and target lifetime, then preserve margin for process variation and correlated hot spots.

Read electromigration through a flux-continuity lens: current-driven transport can occur throughout a line, interface, or via, but irreversible damage localizes where atomic flux diverges and the resulting stress or vacancy concentration crosses a nucleation threshold; reliable copper interconnects are engineered by controlling those discontinuities, not by assuming the metal is immune below one current-density number.