Etch Selectivity is the ratio of etch rates between the target material being removed and adjacent or underlying materials that must be preserved, expressed as the etch rate of the desired material divided by the etch rate of the material to protect. High selectivity allows complete, controlled etching of one layer while leaving underlying films, etch stops, and sidewall spacers intact — directly enabling the complex multilayer patterning required for modern semiconductor devices.
Understanding Selectivity Ratios
Selectivity $S$ is defined as:
$$S_{A/B} = \frac{\text{Etch rate of material A (target)}}{\text{Etch rate of material B (to protect)}}$$
Practical implications:
- $S = 5:1$ — For every 100 nm of target removed, 20 nm of protected material is also consumed — barely acceptable
- $S = 20:1$ — 5 nm lost per 100 nm removed — acceptable for many applications
- $S = 100:1$ — 1 nm lost per 100 nm removed — excellent, suitable for deep trenches
- $S = \infty$ (ideal etch stop) — zero consumption of protected material — achieved with ALE (atomic layer etching) in specific chemistries
Key Selectivity Pairs in Semiconductor Manufacturing
| Process | Target | Protected Material | Selectivity | Chemistry |
|---------|--------|-------------------|-------------|----------|
| Silicon oxide etch | SiO₂ | Si | >50:1 | CHF₃/CF₄ (C₄F₈/Ar/O₂) |
| Silicon trench etch (DRIE) | Si | SiO₂ | >100:1 | SF₆/C₄F₈ (Bosch process) |
| Silicon nitride etch | Si₃N₄ | Si | >20:1 | CH₃F/O₂ or hot H₃PO₄ (wet) |
| Metal gate etch | TiN/TaN | Low-k dielectric | >10:1 | Cl₂/BCl₃ |
| Tungsten CMP stop | W | SiO₂ barrier | Chemical-mechanical | Slurry chemistry |
| Fin etch (FinFET) | Si | SiO₂ hard mask | >100:1 | HBr/Cl₂/O₂ |
| High selectivity contact | SiO₂ | Si₃N₄ etch stop | >100:1 | Dilute HF (wet) |
Physical and Chemical Mechanisms
Selectivity in dry etching arises from the interplay of chemical and physical etch mechanisms:
Chemical etching: Reactive species (F, Cl, Br radicals) chemically react with the target:
- Silicon + 4F → SiF₄ (volatile, pumped away)
- Silicon oxide + fluorocarbon radicals → SiF₄ + CO₂ (slower than pure Si)
- Selectivity arises from different chemical reactivity and volatility of products
Physical sputtering: Energetic ions (Ar⁺, typically 50-500 eV) physically eject atoms:
- Ion bombardment is material-independent — reduces selectivity
- Pure sputter etching has selectivity near 1:1
- Most processes combine chemical + physical for directional, selective etching
Polymer passivation: Carbon-rich fluorocarbon plasmas (C₄F₈, CHF₃) deposit polymer films on surfaces:
- Polymer deposits on horizontal and vertical surfaces
- Ion bombardment removes polymer from horizontal (target) surfaces, enabling etching there
- Vertical surfaces remain polymer-protected → anisotropic etching
- Oxide etches selectively over silicon because polymer deposition is slower on oxide (the oxygen in SiO₂ scavenges carbon)
Etch Stop Layers
High-selectivity processes enable etch stop layers — thin films that terminate etching of an overlying layer:
- SiO₂ / Si₃N₄ etch stop: Nitride stops fluorocarbon oxide etches; used in contact open, via formation
- SiGe / Si etch stop: SiGe etches selectively in Cl₂ or HCl plasma over Si — used in nanosheet GAA transistor release
- ALD oxide etch stop: 5-10 nm ALD Al₂O₃ stops fluorine-based oxide etches — used in tight pitch patterning
- Optical endpoint: Interferometry detects the etch stop layer and triggers endpoint — requires optical selectivity signature
Atomic Layer Etching (ALE): Ultimate Selectivity
ALE achieves near-infinite selectivity through self-limiting surface reactions:
1. Surface modification: Expose surface to reactive gas (e.g., Cl₂ on silicon) → chlorinated monolayer forms (self-limiting after 1 monolayer)
2. Removal: Ion bombardment removes only the modified monolayer (too low energy to sputter unmodified material)
3. Repeat: Remove exactly one atomic monolayer per cycle
ALE is used for:
- Nanosheet transistor fin release (TSMC N2, Intel 18A)
- FinFET spacer trim
- High aspect ratio contact cleaning
- Situations requiring <1 nm precision and >1000:1 effective selectivity
Selectivity Degradation Mechanisms
- Microloading: Dense vs. sparse feature areas etch at different rates due to reactive species depletion
- RIE lag: High aspect ratio features etch slower due to ion shadowing and neutral transport limitations
- Resist erosion: Poor resist-to-film selectivity limits etch depth — requires hard masks at advanced nodes
- Faceting: Corners and edges etch faster than flat surfaces, rounding features
- Notching: At silicon-oxide interfaces, reflected ions create notches at the base of features
Selectivity Measurement and Control
- Sheet resistance monitoring: Metal films measured before/after to determine etch rate
- Spectroscopic ellipsometry: Film thickness measured in-situ at multiple wavelengths
- OES (Optical Emission Spectroscopy): Endpoint detection by monitoring emission from etch byproducts
- Ion mass spectrometry: Quantifies etch byproducts to infer selectivity in real time
- Process control: SPC (Statistical Process Control) on etch rate and uniformity; APC (Advanced Process Control) adjusts recipe parameters to maintain selectivity
Etch selectivity is a fundamental constraint in semiconductor process integration — every new process node requires developing new etch chemistries to meet tighter selectivity requirements as feature dimensions shrink and layer thicknesses decrease from tens of nanometers to single-digit atomic layers.