Fab capital expenditure (CapEx) is the investment required to build and equip semiconductor fabrication facilities, representing one of the largest industrial investments in any sector. Cost breakdown: (1) Building and cleanroom—$2-5B (shell, HVAC, ultra-pure utilities, vibration isolation); (2) Process equipment—$10-20B (lithography, deposition, etch, metrology, implant); (3) Facility systems—$1-3B (UPW, gas delivery, exhaust, waste treatment); (4) IT and automation—$0.5-1B (MES, AMHS, data systems). Total fab cost by node: (1) Mature (28nm+)—$3-8B; (2) Advanced (14/10nm)—$10-15B; (3) Leading edge (5/3nm)—$15-25B; (4) Next generation (2nm)—$25-30B+. Equipment cost dominators: EUV scanners ($150-200M each, 10-20+ per fab), etch tools ($5-10M each, 100+ needed), deposition tools ($3-8M each). CapEx as % of revenue: semiconductor industry typically invests 20-30% of revenue in CapEx (highest of any manufacturing industry). Major CapEx spenders: TSMC ($30-36B/year), Samsung ($25-30B), Intel ($25-30B), SK Hynix ($10-15B). ROI timeline: new fab takes 2-3 years to build, 1-2 years to ramp, 5-7+ years to fully depreciate—long investment horizon. CapEx cycles: investment correlates with demand cycles but leading-edge requires continuous investment regardless of cycle. Government incentives: CHIPS Act ($52B US), EU Chips Act (€43B), Japan/Korea/China subsidies to offset CapEx burden. Fab CapEx trajectory: exponential increase per node creates natural oligopoly at leading edge—only 2-3 companies can sustain investment pace.