Forward Body Bias (FBB) is the technique of applying a voltage that reduces the transistor threshold voltage ($V_{th}$) — making transistors switch faster at the cost of increased leakage current, used to boost performance of slow silicon or to operate at lower supply voltages.

How FBB Works

• NMOS: The p-well (body) voltage is raised slightly above ground (source). For example, $V_{body} = +300$ mV.
• This reduces $V_{th}$ by the body effect → channel forms more easily → more current → faster switching.
• PMOS: The n-well voltage is lowered slightly below VDD. For example, $V_{body} = V_{DD} - 300$ mV.
• This also reduces $|V_{th}|$ for PMOS → faster PMOS switching.

FBB Effects

• Speed Increase: FBB of +300 mV typically increases speed by 10–20% — equivalent to one process sigma improvement.
• Leakage Increase: Lower $V_{th}$ exponentially increases subthreshold leakage — typically 2–5× more leakage with aggressive FBB.
• Power Trade-off: The speed gain comes at a leakage power cost — acceptable during active operation when dynamic power dominates, but FBB should be removed during idle.

When FBB Is Used

• Slow Silicon Rescue: Chips that land on the slow end of the process distribution can be brought up to speed with FBB — improving yield.
• Voltage Reduction: With FBB, the chip can meet its frequency target at a lower VDD — the leakage increase from FBB may be offset by the $V^2$ power savings from lower supply voltage.
• Performance Boost Mode: Temporarily apply FBB for burst performance — then remove it for normal operation.
• Low-Voltage Operation: At very low VDD (near-threshold), FBB is essential to maintain adequate drive current and reasonable speed.

FBB Limits

• Junction Forward Bias: If the body-source junction becomes forward-biased by more than ~400–500 mV, significant junction current flows → power waste and potential latch-up.
• Maximum Safe Bias: Typically limited to +300 to +400 mV to stay well below the junction turn-on voltage.
• Variation Sensitivity: FBB increases sensitivity to $V_{th}$ variation — the already-fast transistors become even faster, potentially causing hold timing violations.

FBB in FD-SOI Technology

• FD-SOI (Fully-Depleted Silicon-On-Insulator) provides exceptional FBB effectiveness — the thin body and back-gate bias allow $V_{th}$ tuning of 80–100 mV per 1V of body bias.
• FD-SOI chips routinely use FBB of +1V or more — much stronger effect than bulk CMOS.
• This makes FD-SOI the preferred technology for applications that rely heavily on body biasing for power-performance optimization.

Forward body bias is a valuable performance tuning knob — it provides post-silicon speed adjustment that can rescue slow dies, enable lower voltage operation, and deliver burst performance when needed.