Power amplifier (PA) is an electronic circuit that increases the power level of an RF or audio signal — converting DC supply power into output signal power. PAs are defined by the transistor technology, biasing class, matching networks, and the fundamental efficiency-linearity trade-off.
Operating classes determine where the transistor is biased on its I-V curve. Class A (conduction angle 360°) is the most linear but least efficient (~50%); Class AB (180-360°) balances linearity and efficiency; Class B (180°) reaches ~78% theoretical efficiency; Class C (< 180°) is highly efficient but nonlinear. Switched-mode classes (D, E, F) can exceed 90% efficiency but require complex harmonic tuning.
Key specifications: Power Added Efficiency (PAE = (Pout-Pin)/PDC) measures how well DC power converts to RF; P1dB is the output power where gain compresses by 1 dB; IP3 (third-order intercept) quantifies intermodulation distortion; Error Vector Magnitude (EVM) measures signal fidelity for modulated waveforms.
Technologies: GaN HEMT dominates high-power (>10W) applications due to high breakdown voltage and electron velocity. GaAs pHEMT leads in high-frequency (>10 GHz) mobile and millimeter-wave. LDMOS silicon handles high-power cellular base stations. SiGe BiCMOS enables highly integrated mmWave arrays.
Linearization is critical for modern wideband modulation (5G NR, 802.11ax). Digital Pre-Distortion (DPD) is the industry standard — a lookup table or polynomial model pre-warps the input to compensate for the PA's AM-AM and AM-PM transfer characteristics, enabling Class-AB efficiency with Class-A linearity.
AI/ML context: AI is transforming PA design through neural-network behavioral models (replacing slow SPICE simulations), reinforcement-learning DPD, and automatic load-pull optimization. For AI chip systems, high-speed wireless interconnects (future mmWave NVLink) will require integrated GaN PAs; autonomous vehicle radar ASICs embed SiGe PA arrays alongside neural network inference engines.
<svg viewBox="0 0 760 470" xmlns="http://www.w3.org/2000/svg" role="img" aria-label="Power Amplifier — circuit topology, load-line, efficiency classes, AI chip RF context">
<defs>
<style>text{font-family:ui-monospace,'Cascadia Code',SFMono-Regular,Consolas,monospace;fill:#c9d1d9}.dim{fill:#8b949e}.hdr{font-size:12px;font-weight:700;fill:#e6edf3}.lrg{font-size:11px;fill:#e6edf3;font-weight:700}.med{font-size:10px}.sm{font-size:9px}</style>
<marker id="pa_arr" markerWidth="7" markerHeight="7" refX="6" refY="3" orient="auto"><path d="M0,0 L6,3 L0,6" fill="#8b949e"/></marker>
<marker id="pa_garr" markerWidth="7" markerHeight="7" refX="6" refY="3" orient="auto"><path d="M0,0 L6,3 L0,6" fill="#3fb950"/></marker>
<marker id="pa_barr" markerWidth="7" markerHeight="7" refX="6" refY="3" orient="auto"><path d="M0,0 L6,3 L0,6" fill="#388bfd"/></marker>
<marker id="pa_rarr" markerWidth="7" markerHeight="7" refX="6" refY="3" orient="auto"><path d="M0,0 L6,3 L0,6" fill="#ff7b72"/></marker>
</defs>
<rect width="760" height="470" fill="#0d1117"/>
<!-- PANEL 1: Common-Source PA topology (x=8,y=8,w=234,h=290) -->
<rect x="8" y="8" width="234" height="290" rx="6" fill="#161b22"/>
<text x="125" y="27" text-anchor="middle" class="hdr">PA Circuit Topology</text>
<!-- VDD rail -->
<line x1="120" y1="40" x2="120" y2="55" stroke="#d29922" stroke-width="2"/>
<text x="132" y="50" class="sm" fill="#d29922">VDD</text>
<line x1="100" y1="40" x2="140" y2="40" stroke="#d29922" stroke-width="2"/>
<!-- Drain choke inductor (RFC) -->
<text x="88" y="67" class="sm dim">RFC</text>
<path d="M120,55 Q112,60 120,65 Q128,70 120,75 Q112,80 120,85" stroke="#e6edf3" stroke-width="1.5" fill="none"/>
<line x1="120" y1="85" x2="120" y2="100" stroke="#e6edf3" stroke-width="1.5"/>
<!-- Output matching network -->
<rect x="140" y="90" width="44" height="24" rx="2" fill="#0d1930" stroke="#388bfd" stroke-width="1"/>
<text x="162" y="105" text-anchor="middle" class="sm" fill="#388bfd">Lm</text>
<line x1="120" y1="100" x2="140" y2="100" stroke="#e6edf3" stroke-width="1.5"/>
<line x1="184" y1="100" x2="220" y2="100" stroke="#e6edf3" stroke-width="1.5"/>
<!-- Cm cap -->
<line x1="204" y1="95" x2="204" y2="90" stroke="#388bfd" stroke-width="1.5"/>
<line x1="200" y1="90" x2="208" y2="90" stroke="#388bfd" stroke-width="2"/>
<line x1="200" y1="87" x2="208" y2="87" stroke="#388bfd" stroke-width="2"/>
<line x1="204" y1="87" x2="204" y2="82" stroke="#388bfd" stroke-width="1.5"/>
<line x1="196" y1="82" x2="212" y2="82" stroke="#30363d" stroke-width="1"/>
<text x="196" y="77" class="sm" fill="#388bfd">Cm</text>
<!-- RL load -->
<rect x="210" y="88" width="22" height="24" rx="2" fill="#21262d" stroke="#8b949e" stroke-width="1"/>
<text x="221" y="103" text-anchor="middle" class="sm dim">RL</text>
<line x1="221" y1="112" x2="221" y2="120" stroke="#8b949e" stroke-width="1"/>
<line x1="216" y1="120" x2="226" y2="120" stroke="#30363d" stroke-width="1"/>
<!-- FET transistor symbol -->
<!-- Gate -->
<line x1="60" y1="110" x2="90" y2="110" stroke="#3fb950" stroke-width="1.5"/>
<text x="38" y="113" class="sm" fill="#3fb950">Gate</text>
<!-- Channel bar -->
<line x1="90" y1="95" x2="90" y2="125" stroke="#e6edf3" stroke-width="2"/>
<!-- Gate-channel gap -->
<line x1="95" y1="95" x2="95" y2="125" stroke="#e6edf3" stroke-width="2"/>
<!-- Drain -->
<line x1="95" y1="98" x2="120" y2="98" stroke="#e6edf3" stroke-width="1.5"/>
<!-- Source -->
<line x1="95" y1="122" x2="120" y2="122" stroke="#e6edf3" stroke-width="1.5"/>
<line x1="120" y1="122" x2="120" y2="140" stroke="#e6edf3" stroke-width="1.5"/>
<text x="128" y="100" class="sm dim">D</text>
<text x="128" y="125" class="sm dim">S</text>
<!-- GaN HEMT label -->
<text x="55" y="142" class="sm" fill="#d29922">GaN HEMT</text>
<!-- Source to ground -->
<line x1="120" y1="140" x2="120" y2="152" stroke="#e6edf3" stroke-width="1.5"/>
<line x1="108" y1="152" x2="132" y2="152" stroke="#8b949e" stroke-width="2"/>
<line x1="112" y1="156" x2="128" y2="156" stroke="#8b949e" stroke-width="1.5"/>
<line x1="116" y1="160" x2="124" y2="160" stroke="#8b949e" stroke-width="1"/>
<text x="133" y="158" class="sm dim">GND</text>
<!-- Input matching / bias -->
<rect x="28" y="90" width="30" height="16" rx="2" fill="#0d1930" stroke="#388bfd" stroke-width="1"/>
<text x="43" y="101" text-anchor="middle" class="sm" fill="#388bfd">IMN</text>
<line x1="28" y1="98" x2="20" y2="98" stroke="#388bfd" stroke-width="1.5"/>
<text x="14" y="95" class="sm" fill="#388bfd">RF</text>
<text x="12" y="105" class="sm" fill="#388bfd">in</text>
<line x1="58" y1="98" x2="60" y2="110" stroke="#3fb950" stroke-width="1.5"/>
<!-- Bias network -->
<text x="18" y="130" class="sm dim">Vbias→</text>
<line x1="46" y1="130" x2="60" y2="120" stroke="#d29922" stroke-width="1" stroke-dasharray="3,2"/>
<!-- RF out arrow -->
<line x1="220" y1="100" x2="232" y2="100" stroke="#3fb950" stroke-width="1.5" marker-end="url(#pa_garr)"/>
<text x="224" y="95" class="sm" fill="#3fb950">RF</text>
<text x="220" y="92" class="sm" fill="#3fb950">out</text>
<!-- Key params box -->
<rect x="18" y="170" width="214" height="120" rx="3" fill="#0d1117" stroke="#30363d" stroke-width="1"/>
<text x="125" y="186" text-anchor="middle" class="sm" fill="#e6edf3" font-weight="700">Key PA Parameters</text>
<text x="26" y="202" class="sm dim">Gain (dB):</text>
<text x="100" y="202" class="sm" fill="#3fb950">power out / power in ratio</text>
<text x="26" y="216" class="sm dim">P1dB:</text>
<text x="100" y="216" class="sm" fill="#388bfd">1dB compression point</text>
<text x="26" y="230" class="sm dim">PAE (%):</text>
<text x="100" y="230" class="sm" fill="#d29922">(Pout-Pin)/PDC × 100</text>
<text x="26" y="244" class="sm dim">IP3:</text>
<text x="100" y="244" class="sm" fill="#ff7b72">3rd-order intercept</text>
<text x="26" y="258" class="sm dim">Noise Fig:</text>
<text x="100" y="258" class="sm">NF = 10log(SNR_in/SNR_out)</text>
<text x="26" y="272" class="sm dim">VSWR:</text>
<text x="100" y="272" class="sm">impedance match quality</text>
<text x="26" y="286" class="sm dim">EVM:</text>
<text x="100" y="286" class="sm">error vector magnitude (IQ)</text>
<!-- PANEL 2: Load-line + Classes (x=250,y=8,w=244,h=290) -->
<rect x="250" y="8" width="244" height="290" rx="6" fill="#161b22"/>
<text x="372" y="27" text-anchor="middle" class="hdr">Load-Line + Amplifier Classes</text>
<!-- I-V plane for load line -->
<line x1="268" y1="200" x2="480" y2="200" stroke="#30363d" stroke-width="1" marker-end="url(#pa_arr)"/>
<line x1="268" y1="200" x2="268" y2="40" stroke="#30363d" stroke-width="1" marker-end="url(#pa_arr)"/>
<text x="482" y="204" class="sm dim">Vds</text>
<text x="258" y="38" class="sm dim">Id</text>
<!-- Load line -->
<line x1="268" y1="55" x2="462" y2="200" stroke="#e6edf3" stroke-width="1.5" stroke-dasharray="5,3"/>
<text x="430" y="185" class="sm dim">Load</text>
<text x="430" y="196" class="sm dim">line</text>
<!-- Saturation region -->
<rect x="268" y="40" width="40" height="160" fill="#ff7b72" opacity="0.12"/>
<text x="272" y="52" class="sm" fill="#ff7b72">Sat.</text>
<!-- Class A operating point -->
<circle cx="365" cy="118" r="5" fill="#3fb950"/>
<text x="368" y="114" class="sm" fill="#3fb950">A (50%)</text>
<!-- Class AB operating point -->
<circle cx="395" cy="148" r="5" fill="#d29922"/>
<text x="398" y="144" class="sm" fill="#d29922">AB</text>
<!-- Class B operating point -->
<circle cx="430" cy="178" r="5" fill="#388bfd"/>
<text x="433" y="174" class="sm" fill="#388bfd">B (78%)</text>
<!-- Class C — near cutoff -->
<circle cx="452" cy="194" r="5" fill="#ff7b72"/>
<text x="454" y="190" class="sm" fill="#ff7b72">C</text>
<!-- Vq label -->
<line x1="365" y1="200" x2="365" y2="206" stroke="#3fb950" stroke-width="1"/>
<text x="358" y="213" class="sm" fill="#3fb950">Vq</text>
<!-- Idq label -->
<line x1="268" y1="118" x2="262" y2="118" stroke="#3fb950" stroke-width="1"/>
<text x="244" y="121" class="sm" fill="#3fb950">Idq</text>
<!-- Efficiency vs linearity trade-off -->
<text x="262" y="232" class="sm" fill="#e6edf3" font-weight="700">Class Efficiency vs Linearity:</text>
<!-- Bar chart -->
<rect x="262" y="240" width="90" height="10" rx="1" fill="#3fb950" opacity="0.8"/>
<text x="355" y="250" class="sm" fill="#3fb950"> A: ~50%, best linear</text>
<rect x="262" y="254" width="110" height="10" rx="1" fill="#d29922" opacity="0.8"/>
<text x="375" y="264" class="sm" fill="#d29922"> AB: ~60%, good linear</text>
<rect x="262" y="268" width="130" height="10" rx="1" fill="#388bfd" opacity="0.8"/>
<text x="395" y="278" class="sm" fill="#388bfd"> B: ~78%, moderate</text>
<rect x="262" y="282" width="160" height="10" rx="1" fill="#ff7b72" opacity="0.8"/>
<text x="425" y="292" class="sm" fill="#ff7b72"> C: ~90%+, nonlinear</text>
<!-- PANEL 3: PA Technologies (x=502,y=8,w=250,h=290) -->
<rect x="502" y="8" width="250" height="290" rx="6" fill="#161b22"/>
<text x="627" y="27" text-anchor="middle" class="hdr">PA Technologies + Topologies</text>
<!-- Technology comparison -->
<text x="514" y="46" class="sm" fill="#e6edf3" font-weight="700">Transistor Technologies:</text>
<text x="514" y="62" class="sm" fill="#3fb950">GaN HEMT</text>
<text x="514" y="74" class="sm dim">30–100W, 1–40GHz, 70% PAE</text>
<text x="514" y="86" class="sm dim">mmWave 5G base stations, radar</text>
<text x="514" y="102" class="sm" fill="#d29922">GaAs pHEMT</text>
<text x="514" y="114" class="sm dim">0.5–5W, 1–100GHz, 45% PAE</text>
<text x="514" y="126" class="sm dim">Mobile handsets, WiFi 6E/7</text>
<text x="514" y="142" class="sm" fill="#388bfd">LDMOS Si</text>
<text x="514" y="154" class="sm dim">50–300W, <4GHz, 65% PAE</text>
<text x="514" y="166" class="sm dim">Cellular macro BTS, broadcast</text>
<text x="514" y="182" class="sm" fill="#ff7b72">SiGe BiCMOS</text>
<text x="514" y="194" class="sm dim">1mW–100mW, to 300GHz</text>
<text x="514" y="206" class="sm dim">mmWave phased array, automotive</text>
<line x1="514" y1="212" x2="742" y2="212" stroke="#30363d" stroke-width="1"/>
<!-- Topology table -->
<text x="514" y="226" class="sm" fill="#e6edf3" font-weight="700">Efficiency Topologies:</text>
<text x="514" y="242" class="sm" fill="#3fb950">Doherty PA</text>
<text x="602" y="242" class="sm dim">carrier + peaking; 50-60% avg</text>
<text x="514" y="256" class="sm" fill="#d29922">Class-E</text>
<text x="602" y="256" class="sm dim">switch-mode; >90% peak</text>
<text x="514" y="270" class="sm" fill="#388bfd">Envelope Tracking</text>
<text x="602" y="270" class="sm dim">VDD tracks envelope; +5-8%</text>
<text x="514" y="284" class="sm" fill="#ff7b72">Outphasing (LINC)</text>
<text x="602" y="284" class="sm dim">2 PAs + combiner; >70% eff</text>
<!-- CARD 1: Matching Networks -->
<rect x="8" y="305" width="234" height="158" rx="6" fill="#161b22"/>
<text x="125" y="322" text-anchor="middle" class="hdr">Matching Networks + Stability</text>
<text x="18" y="338" class="sm" fill="#3fb950" font-weight="700">Impedance Matching:</text>
<text x="18" y="352" class="sm dim">Source: 50Ω → low Ropt of transistor</text>
<text x="18" y="364" class="sm dim">Output: Ropt → 50Ω load</text>
<text x="18" y="376" class="sm dim">Techniques: L-net, Pi-net, T-net, coupled</text>
<text x="18" y="388" class="sm" fill="#d29922" font-weight="700">Bandwidth:</text>
<text x="18" y="400" class="sm dim">Bode-Fano limit: BW × RL inversely linked</text>
<text x="18" y="412" class="sm dim">Broadband: resistive match (lossy), filters</text>
<text x="18" y="424" class="sm" fill="#ff7b72" font-weight="700">Stability (K-factor):</text>
<text x="18" y="436" class="sm dim">Rollett K > 1 + |Δ| < 1 = unconditionally stable</text>
<text x="18" y="448" class="sm dim">Source/load terminations must avoid |S11|>1</text>
<text x="18" y="460" class="sm dim">Stabilize: series R at gate (lossy, NF penalty)</text>
<!-- CARD 2: Linearization -->
<rect x="250" y="305" width="244" height="158" rx="6" fill="#161b22"/>
<text x="372" y="322" text-anchor="middle" class="hdr">Linearization Techniques</text>
<text x="260" y="338" class="sm" fill="#3fb950" font-weight="700">DPD (Digital Pre-Distortion):</text>
<text x="260" y="350" class="sm dim">Pre-warps input to cancel PA nonlinearity</text>
<text x="260" y="362" class="sm dim">LUT or Volterra series model; adaptive</text>
<text x="260" y="374" class="sm dim">Corrects AM-AM and AM-PM distortion</text>
<text x="260" y="386" class="sm" fill="#d29922" font-weight="700">Feedback methods:</text>
<text x="260" y="398" class="sm dim">Cartesian feedback: IQ loop, <20MHz BW</text>
<text x="260" y="410" class="sm dim">Polar: envelope + phase separate paths</text>
<text x="260" y="422" class="sm" fill="#388bfd" font-weight="700">Feed-forward:</text>
<text x="260" y="434" class="sm dim">Error amplifier cancels distortion; wideband</text>
<text x="260" y="446" class="sm dim">High linearity but poor efficiency (aux amp)</text>
<text x="260" y="458" class="sm dim">Used in BTS where power budget allows</text>
<!-- CARD 3: AI Chip RF Context -->
<rect x="502" y="305" width="250" height="158" rx="6" fill="#161b22"/>
<text x="627" y="322" text-anchor="middle" class="hdr">PA in AI Chip Systems</text>
<text x="514" y="338" class="sm" fill="#3fb950" font-weight="700">AI accelerator connectivity:</text>
<text x="514" y="352" class="sm dim">NVLink/PCIe: copper, no PA needed</text>
<text x="514" y="364" class="sm dim">Wireless NVLink (future): mmWave PA required</text>
<text x="514" y="376" class="sm dim">Compute-in-package RF: GaN on SiC flip-chip</text>
<text x="514" y="388" class="sm" fill="#388bfd" font-weight="700">AI-driven PA design:</text>
<text x="514" y="400" class="sm dim">RL-based DPD: 3dB better ACLR vs LUT DPD</text>
<text x="514" y="412" class="sm dim">Neural network load-pull: predict Zopt</text>
<text x="514" y="424" class="sm dim">GAN-based PA behavioral models (fast SPICE)</text>
<text x="514" y="436" class="sm" fill="#d29922" font-weight="700">Radar + sensing:</text>
<text x="514" y="448" class="sm dim">Automotive radar 77GHz: SiGe PA, 20dBm</text>
<text x="514" y="460" class="sm dim">AI inference for beam-steering (phased array)</text>
</svg>
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