Home Knowledge Base Hardmask Patterning in Semiconductor Etch

Hardmask Patterning in Semiconductor Etch is the use of inorganic or dense carbon films as etch-resistant intermediate layers between the photoresist and the target film — since photoresist alone lacks the etch resistance to withstand deep or long silicon, oxide, or metal etches, hardmasks allow the lithographic image to be transferred first into a durable material that can then faithfully transfer the pattern into the underlying target layer with the required etch depth and profile precision.

Why Hardmasks Are Needed

Common Hardmask Materials

MaterialDepositionSelectivity to SiSelectivity to SiO₂Uses
SiO₂TEOS PECVD50:1Gate poly etch
SiN (Si₃N₄)PECVD/LPCVD20:15:1STI etch cap
TiNPVD/ALDHighHighVia/contact etch
APF (amorphous C)CVD100:150:1Deep silicon/HARC
Spin-on C (SOC)Spin50:130:1Patterning stacks

Advanced Patterning Hard Mask Stack

Amorphous Carbon (APF) Hardmask

Titanium Nitride (TiN) Hardmask

Pattern Transfer Flow

1. Coat hardmask stack on target film. 2. Expose photoresist → develop → resist pattern formed. 3. SiARC etch (dry) → transfers resist pattern into SiARC. 4. SOC etch (O₂/N₂) → transfers into thick carbon layer. 5. SiN hardmask etch (CF₄) → transfers into inorganic hardmask. 6. Resist + SOC removed (O₂ strip → ash). 7. Target film etch using SiN hardmask → long, high-AR etch → hardmask survives. 8. SiN hardmask removal (selective wet or dry) → target pattern complete.

CD Budget in Hardmask Transfer

Hardmask patterning is the mechanical engineering beneath the optical engineering of photolithography — by providing an etch-resistant intermediate layer that can be faithfully patterned by photoresist and then used to etch far deeper and more precisely than photoresist alone could survive, hardmasks extend the pattern transfer fidelity from the 50nm resist image all the way through 500nm of target material, enabling the deep contact holes, high-aspect-ratio vias, and precisely vertical gate stacks that define modern semiconductor device geometry and without which the combination of thin EUV resist and aggressive etch targets at leading nodes would be simply impossible to execute reliably.

hardmask etchsilicon nitride hardmaskcarbon hardmaskashable hardmaskpatterning hardmaskhard mask stack

Explore 500+ Semiconductor & AI Topics

From EUV lithography to CUDA optimization — search the full knowledge base or chat with our AI assistant.