In-Memory Computing (CIM) is a paradigm shift where multiply-accumulate (MAC) operations execute directly within memory arrays using analog charge accumulation, eliminating the von Neumann bottleneck of moving data between memory and processing units.

Analog MAC in SRAM/RRAM Arrays

• SRAM CIM: Bit-cell current modulated by stored weight during read. Sense amplifier sums weighted currents across rows/columns. MAC result in analog domain (current/voltage).
• RRAM CIM: Memristor conductance programs weight. Word line pulse applies activation voltage; output current proportional to activation × weight.
• Dot-Product Computation: Column (or row) of weights simultaneously multiplied by single activation. N-way parallelism with single read operation vs N separate reads in traditional memory.

Weight-Stationary Architecture

• Static Weights: Weights stored permanently in memory cells (SRAM/RRAM). Single input activation stream processed against all weights.
• Output Stationary Alternative: Weights stream, partial sums accumulate. Less common due to reduced memory locality.
• Systolic-like Operation: Different from systolic arrays. Data flows to distributed memory, computation happens in-situ rather than in dedicated ALUs.

Peripheral Analog/Digital Conversion

• Input DAC: Converts digital activation to analog voltage/current for memory access. Must handle weight precision (6-8 bits typical).
• Output ADC: Sense amplifier output integrates accumulated charge. Quantization noise limits precision. Typically 8-10 effective bits.
• Noise and Variability: Semiconductor mismatch (Vth variation) and process/temperature drift degrade MAC accuracy. Requires statistical modeling and resilient algorithms.

Digital vs Analog CIM Trade-offs

• Analog Advantages: Energy efficiency (10-100x better per MAC), density (no multiplier area), single-cycle latency.
• Analog Disadvantages: Noise sensitivity limits precision (quantization, thermal noise), requires accurate ADC/DAC, temperature compensation.
• Digital CIM Alternative: Compute in digital domain within memory (bit-serial multiplication). Lower power than CPU/GPU but higher than analog CIM.

Die-Level Energy Comparison and Applications

• Energy per MAC: Analog CIM ~10-100 fJ/MAC. CPU/GPU ~1-10 pJ/MAC. 10-100x improvement for inference.
• Scalability Limits: Analog CIM shines for matrix multiplication bottlenecks (DNNs, linear transformations). Doesn't help for sparse patterns or data-dependent control flow.
• Adoption Status: Research phase in academia and DARPA MALIBU programs. Few commercial products (Samsung, Mythic AI developing). Requires compiler/framework support for practical deployment.