Intrinsic Gettering (IG) is the process of using oxygen precipitates and their associated extended defects (stacking faults, dislocation loops) formed naturally within the bulk of Czochralski silicon wafers during thermal processing to trap and immobilize metallic impurities — it is the most widely used gettering technique in semiconductor manufacturing, exploiting the inherent supersaturation of interstitial oxygen in CZ silicon to create an internal contamination sink that keeps the active surface device layer clean without requiring any additional backside processing steps.

What Is Intrinsic Gettering?

• Definition: A gettering strategy that relies on defects already present or developed within the silicon wafer bulk — specifically oxygen precipitates (SiO_x clusters) that form when the supersaturated interstitial oxygen in Czochralski-grown silicon agglomerates during thermal processing, along with the stacking faults and dislocation loops punched out by the volumetric strain of the growing precipitates.
• Oxygen Source: Czochralski silicon contains 5-20 ppma of interstitial oxygen dissolved from the silica crucible during crystal growth — this oxygen concentration far exceeds the solid solubility at typical processing temperatures (below 1100 degrees C), providing the thermodynamic supersaturation that drives precipitation.
• BMD Formation: During thermal processing, oxygen atoms diffuse and cluster into Bulk Micro-Defects (BMDs) — initially amorphous SiO_x platelets that grow, crystallize, and develop surrounding dislocation loops and stacking faults that provide the extended strain fields and surface area needed for effective metal trapping.
• Denuded Zone: The critical companion feature of IG is the Denuded Zone (DZ) — the top 10-20 microns of the wafer where oxygen has out-diffused during high-temperature processing, remaining precipitate-free and providing a pristine crystalline foundation for device fabrication.

Why Intrinsic Gettering Matters

• Industry Standard: Intrinsic gettering is the foundational yield enhancement technique used in virtually every CZ silicon CMOS manufacturing line — wafer vendors control initial oxygen concentration ([Oi]) within tight specifications (12-18 ppma) specifically to enable IG in the customer's thermal process.
• Self-Activating: IG requires no additional processing steps — the oxygen precipitates form automatically during the normal thermal budget of CMOS fabrication (oxidation, implant activation, silicidation, backend annealing), making it inherently process-compatible.
• Trapping Efficiency: A BMD density of 10^9 precipitates/cm^3 (achievable with standard [Oi] and thermal budgets) provides sufficient gettering capacity to reduce iron concentrations in the active region by 100-1000x — from 10^12-10^13 atoms/cm^3 (contaminated) to below 10^10 atoms/cm^3 (clean).
• Wafer Specification Control: The entire CZ silicon wafer specification system — oxygen concentration, nitrogen doping, thermal donor behavior, and vacancy/interstitial balance — is designed around enabling reliable IG performance in the customer's specific thermal process flow.
• Cost-Free Protection: Because IG exploits an inherent property of CZ silicon (dissolved oxygen) and is activated by thermal steps that are already in the process flow, it provides contamination protection at essentially zero incremental manufacturing cost.

How Intrinsic Gettering Is Optimized

• Hi-Lo-Hi Thermal Cycle: The classic IG optimization uses a three-step thermal profile — high temperature (above 1100 degrees C) to out-diffuse oxygen from the surface and form the denuded zone, low temperature (600-800 degrees C) to nucleate precipitate seeds in the supersaturated bulk, and medium temperature (900-1050 degrees C) to grow the nuclei into large effective gettering sites.
• Wafer Oxygen Specification: Initial [Oi] is specified to balance IG effectiveness (higher [Oi] = more precipitates = better gettering) against the risk of excessive precipitation (too many/too large precipitates = wafer warpage and slip during thermal processing).
• MDZ (Magic Denuded Zone) Wafers: For advanced low-thermal-budget processes that cannot develop sufficient IG through their own thermal steps, wafer vendors offer pre-annealed MDZ wafers with BMDs and DZ already formed before the wafer enters the fab.

Intrinsic Gettering is the silicon industry's built-in contamination defense — by controlling the oxygen dissolved in the crystal during growth and allowing it to precipitate into bulk defects during processing, CZ wafers automatically develop an internal trap network that captures metallic impurities and preserves the crystalline perfection of the active device region.