Semiconductor intellectual property (IP) refers to pre-designed, pre-verified reusable circuit blocks that chip designers integrate into their SoCs rather than designing from scratch, accelerating time-to-market. IP types: (1) Processor cores—ARM Cortex (mobile/embedded), RISC-V (open ISA), Synopsys ARC, Cadence Tensilica; (2) Interface IP—PCIe, USB, DDR/LPDDR memory controllers, Ethernet, MIPI, HDMI; (3) Analog/mixed-signal—PLLs, ADCs/DACs, SerDes, voltage regulators; (4) Memory compilers—SRAM, ROM, register file generators; (5) Physical IP—standard cell libraries, I/O cells, ESD structures; (6) Security—crypto engines, secure elements, PUF (physically unclonable function). IP delivery forms: (1) Soft IP—synthesizable RTL (Verilog/VHDL), portable across nodes; (2) Hard IP—GDSII layout optimized for specific process node, highest performance; (3) Firm IP—partially optimized netlist with floor plan guidance. Major IP vendors: (1) ARM—dominant mobile/embedded processor IP ($5B+ revenue); (2) Synopsys—interface, processor, verification IP; (3) Cadence—interface, memory, analog IP; (4) Rambus—memory interface, security; (5) Imagination—GPU IP. Business models: (1) License fee—upfront payment for right to use IP; (2) Royalty—per-chip payment based on production volume; (3) Subscription—annual access to IP portfolio. IP economics: modern SoC may contain 100+ IP blocks, custom logic often <30% of die area. IP verification: silicon-proven IP reduces risk vs. custom design. The IP licensing ecosystem enables fabless companies to build complex SoCs rapidly, supporting the semiconductor industry's pace of innovation.