Home› Knowledge Base› LDMOS (Laterally Diffused Metal-Oxide-Semiconductor)

LDMOS (Laterally Diffused Metal-Oxide-Semiconductor) is the power transistor architecture where the channel region is formed by lateral diffusion of the body (p-type) into an n-drift region, creating a transistor with high breakdown voltage, excellent RF linearity, and sufficient gain to amplify signals from MHz to multi-GHz frequencies — making LDMOS the dominant technology for base station power amplifiers, broadcast transmitters, industrial RF, and high-voltage power management ICs that require simultaneous high power (10 W to multi-kW), high gain (10–18 dB), and rugged reliability.

LDMOS Structure

<svg viewBox="0 0 401 207" xmlns="http://www.w3.org/2000/svg" style="max-width:100%;height:auto" role="img"><rect x="0" y="0" width="401" height="207" rx="12" fill="#0d1117"/><g font-family="ui-monospace,SFMono-Regular,Menlo,Consolas,&quot;Liberation Mono&quot;,monospace" font-size="14"><text xml:space="preserve" x="20" y="31.7"><tspan fill="#c9d1d9">Gate</tspan></text><text xml:space="preserve" x="20" y="50.7"><tspan fill="#c9d1d9">  </tspan><tspan fill="#6e7681">↓</tspan></text><text xml:space="preserve" x="20" y="69.7"><tspan fill="#6e7681">─────────────────────────────────────────</tspan></text><text xml:space="preserve" x="20" y="88.7"><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">Source</tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">P-body</tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9"> N-channel </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9"> N-drift </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">Drain</tspan><tspan fill="#6e7681">│</tspan></text><text xml:space="preserve" x="20" y="107.7"><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9"> (n+) </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9"> (p)  </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9"> (induced) </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9"> (n-)   </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">(n+) </tspan><tspan fill="#6e7681">│</tspan></text><text xml:space="preserve" x="20" y="126.7"><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">      </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">      </tspan><tspan fill="#6e7681">│←──</tspan><tspan fill="#c9d1d9">Leff</tspan><tspan fill="#6e7681">────→│←──</tspan><tspan fill="#c9d1d9">Ld</tspan><tspan fill="#6e7681">──→│</tspan><tspan fill="#c9d1d9">     </tspan><tspan fill="#6e7681">│</tspan></text><text xml:space="preserve" x="20" y="145.7"><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">      </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">      </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">            </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">        </tspan><tspan fill="#6e7681">│</tspan><tspan fill="#c9d1d9">     </tspan><tspan fill="#6e7681">│</tspan></text><text xml:space="preserve" x="20" y="164.7"><tspan fill="#6e7681">─────────────────────────────────────────</tspan></text><text xml:space="preserve" x="20" y="183.7"><tspan fill="#c9d1d9">            P-type substrate</tspan></text></g></svg>

LDMOS vs. Standard MOSFET

ParameterStandard MOSFETLDMOS
Breakdown voltage2–5 V28–65 V (RF), 100–800 V (power)
On-resistanceLowHigher (drift region adds Ron)
FrequencyDC–10 GHzDC–6 GHz (RF LDMOS)
LinearityModerateExcellent (smooth Gm vs. Vgs)
Die sizeSmallLarger (long drift region)

LDMOS Process Flow

1. P-type substrate
2. N-buried layer (optional, for isolation)
3. P-well / P-body diffusion (lateral diffusion defines channel)
4. N-drift implant (sets breakdown voltage, Ron tradeoff)
5. RESURF optimization: Adjust P-substrate / N-drift charge balance
6. Gate oxide growth (thin, 5–10 nm)
7. Poly gate deposition + etch
8. P-body extension (lateral diffusion under gate → sets Leff)
9. N+ source in P-body; N+ drain on drift edge
10. Source metal connected to P-body (source-body short)
11. Drain metal over field oxide (with field plate)

Field Plate

RF Performance Metrics

MetricTypical LDMOSDefinition
Pout5–100 W/dieOutput power
Gain12–18 dBPower gain at 3.5 GHz
PAE50–65%Power Added Efficiency
ACPRāˆ’50 to āˆ’55 dBcAdjacent Channel Power Ratio (linearity)
Ruggedness10:1 VSWRWithstands severe load mismatch

Applications

LDMOS is the workhorse of high-power RF amplification worldwide — its unique combination of RESURF-enabled high breakdown voltage, source-body shorted topology for stability, and smooth transconductance for linearity makes it the go-to power transistor for infrastructure, broadcast, and industrial RF applications where GaN's higher cost or reliability questions make silicon LDMOS the preferred choice.

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