A level shifter is a circuit that converts a signal from one voltage domain to another — enabling communication between power domains operating at different supply voltages, which is essential in multi-voltage designs where different blocks run at different VDD levels for power optimization.

Why Level Shifting Is Needed

• Modern SoCs use multiple voltage domains — CPU cores at 0.8V, I/O at 1.8V, memory at 1.1V, always-on logic at 0.5V, etc.
• When a signal crosses from one voltage domain to another, it must be converted to the receiving domain's voltage levels:
• A 0.8V output cannot reliably drive a 1.8V input — the "high" level (0.8V) may not be recognized as logic 1 by the 1.8V receiver.
• A 1.8V output driving a 0.8V input may damage the receiving transistors (overvoltage stress).

Level Shifter Types

• Low-to-High (LH) Level Shifter: Converts a low-voltage signal to a higher voltage.
• Input: 0 to VDD_low (e.g., 0.8V)
• Output: 0 to VDD_high (e.g., 1.8V)
• Most common type — used when a low-power core drives an I/O block.
• Circuit: Typically uses cross-coupled PMOS + NMOS input pair powered by VDD_high.

• High-to-Low (HL) Level Shifter: Converts a high-voltage signal to a lower voltage.
• Input: 0 to VDD_high
• Output: 0 to VDD_low
• Simpler — can sometimes be just a buffer powered by VDD_low (if VDD_high's "high" level is acceptable as input to VDD_low devices).

• Dual-Supply Level Shifter: Has connections to both supply domains — both VDD_low and VDD_high.

Level Shifter Characteristics

• Propagation Delay: Level shifters add delay to the signal path — typically 50–200 ps depending on the voltage ratio and design.
• Power: Additional switching power from the level conversion circuitry.
• Area: Level shifter cells are larger than standard buffers — each voltage domain crossing needs one.
• Directionality: Most level shifters are unidirectional — separate cells for LH and HL.

Level Shifters in the Design Flow

• UPF/CPF Specification: The power intent file (UPF or CPF) specifies which domains exist and the level shifter requirements for each crossing.
• Automatic Insertion: Synthesis and P&R tools automatically insert level shifters at every voltage domain boundary based on the UPF/CPF specification.
• Placement: Level shifters are typically placed at the boundary between voltage domains.
• Verification: Tools verify that every cross-domain signal has an appropriate level shifter — missing level shifters cause functional failures.

Special Cases

• Enable Level Shifter: A level shifter with an enable/isolation function — combines level shifting and isolation in one cell for power-gated domains.
• Retention Level Shifter: A level shifter that maintains its output during power transitions.
• Bidirectional Level Shifter: For signals that can be driven from either domain — less common, more complex.

Level shifters are mandatory infrastructure in multi-voltage designs — without them, signals cannot reliably cross between voltage domains, making multi-VDD power optimization impossible.