Lot merging is a fab scheduling operation that combines multiple smaller wafer lots into a single larger lot for joint processing, trading equipment-changeover time for the loss of individual lot identity and added traceability burden. Semiconductor equipment changeovers — reloading a different recipe, chemistry, or reticle set — can consume hours of tool time in which no wafers are processed, so a scheduler that can process compatible lots back-to-back under a single setup captures that idle time as usable throughput. Lot merging is the mechanism that makes that possible: instead of running Lot A, changing over, then running Lot C, the scheduler physically or logically combines A and C into one lot and processes all wafers under a single continuous setup.

Merge criteria. Lots are only eligible to merge if they are process-compatible in every dimension the tool step cares about: identical product specification, compatible priority levels (so a high-priority lot is not delayed by being folded into a lower-priority merge), wafers within an acceptable date/queue-time range of each other, matching quality requirements, and — where contractually required — explicit customer approval, since merging can affect how lot-level yield and quality data are attributed back to the originating order.

The traceability cost. The central risk of lot merging is that it weakens the one-to-one mapping between a lot ID and a physical, homogeneous group of wafers that fab genealogy systems are built around. Once wafers from Lot A and Lot C are merged and co-processed, a contamination event, tool excursion, or quality escape affecting the merged lot potentially implicates every wafer in it, even though only a subset may actually share the root-cause exposure. Fabs manage this with genealogy tracking: the manufacturing execution system (MES) records the merge event, the constituent source lots, and (where the process allows) which specific wafers came from which source lot, so that if a defect is later traced to the merge, engineers can still narrow the investigation using wafer-level records rather than treating the entire merged quantity as equally suspect.

Split-after-merge and re-identification. Many fabs merge lots only for the duration of a shared process step and then split them back into their original lot identities immediately afterward, preserving customer-level order tracking for all downstream steps while still capturing the setup-time benefit at the merged step. This "merge for one step, split immediately after" pattern is common precisely because it captures most of the scheduling benefit while minimizing the traceability exposure window to a single process step rather than the remainder of the flow.

Scheduling tradeoffs. Lot merging is a scheduling optimization, not a free efficiency gain: waiting for a compatible lot to merge with can itself introduce queue-time delay, which matters for time-sensitive process steps (post-implant anneal windows, moisture-sensitive queue limits, oxidation-sensitive surfaces) where the wait for a merge partner can cost more in quality risk than the changeover time it saves. Production schedulers weigh merge opportunities against these queue-time constraints, and advanced scheduling systems increasingly automate the merge-eligibility check so that only genuinely compatible, time-safe lots are proposed for merging rather than relying on manual judgment calls at the tool.

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Net effect. Lot merging is a targeted tool for capturing idle changeover time at bottleneck steps, applied selectively where the compatibility criteria and traceability discipline can be maintained — not a blanket batching strategy, since the genealogy and queue-time costs scale with how aggressively lots are combined.