Low Energy Electron Diffraction (LEED) is a surface-sensitive structural analysis technique that determines the two-dimensional crystallographic arrangement of atoms on a surface by directing a low-energy electron beam (20-500 eV) at a single-crystal surface and observing the resulting diffraction pattern on a hemispherical fluorescent screen. The short inelastic mean free path of low-energy electrons (~0.5-1 nm) ensures that only the topmost 2-3 atomic layers contribute to the diffraction pattern.

Why LEED Matters in Semiconductor Manufacturing: LEED provides direct determination of surface crystal structure and order essential for epitaxial growth development, surface preparation verification, and understanding surface reconstructions that influence nucleation, adhesion, and interface quality.

• Surface reconstruction identification — LEED patterns reveal surface periodicities different from the bulk (e.g., Si(100)-2×1, Si(111)-7×7, GaAs(100)-2×4), verifying proper surface preparation for epitaxial growth • Epitaxial growth monitoring — Real-time LEED during MBE or other UHV deposition confirms epitaxial alignment, monitors surface ordering, and detects the onset of 3D island formation (spotty LEED → transmission diffraction) • Surface cleanliness verification — Sharp, intense LEED spots with low background indicate a clean, well-ordered surface; diffuse background or extra spots indicate contamination or disorder, guiding surface preparation optimization • Overlayer structure determination — Adsorption of atoms or molecules creates superstructure spots in the LEED pattern, revealing adsorbate periodicity, coverage, and binding configuration on semiconductor surfaces • Quantitative structure analysis (LEED I-V) — Measuring spot intensities as a function of beam energy and comparing with dynamical scattering calculations determines atomic positions (bond lengths, interlayer spacings) with ±0.02 Å precision

Low energy electron diffraction is the foundational technique for determining surface crystallographic structure and order, providing direct, real-time feedback on surface preparation, epitaxial growth, and surface reconstructions that govern the quality of every epitaxial film, interface, and heterostructure in advanced semiconductor device fabrication.